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부품번호 TPS61256C 기능
기능 3.5-MHz High Efficiency Step-Up Converter
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TPS61256C
SLVSDQ1 – FEBRUARY 2017
TPS61256xC 3.5-MHz High Efficiency Step-Up Converter In Chip Scale Packaging
1 Features
1 93% Efficiency at 3.5-MHz Operation
• 37-µA Quiescent Current in Normal Operation
• Wide VIN Range From 2.3 V to 5.5 V
• Support VIN VOUT Operation
• ±2% Total DC Voltage Accuracy
• Light-Load PFM Mode
• Pass-through Mode by Pulling EN Low
• Thermal Shutdown and Overload Protection
• Only Three Surface-Mount External Components
Required
• Total Solution Size < 25 mm2
• 9-Pin NanoFree™ (CSP) Packaging
2 Applications
• NFC PA Supply
• Cell Phones, Smart Phones
• Mono and Stereo APA Applications
• USB Charging Ports
3 Description
The TPS61256xC device provides a power supply
solution for battery-powered portable applications.
Intended for low-power applications, the
TPS61256xC supports up to 800-mA load current
from a battery discharged as low as 2.65 V and
allows the use of low cost chip inductor and
capacitors.
With a wide input voltage range of 2.3 V to 5.5 V, the
device supports applications powered by Li-Ion
batteries with extended voltage range. Different fixed
voltage output versions are available from 3.15 V to
5.0 V.
The TPS61256xC operates at a regulated 3.5-MHz
switching frequency and enters power-save mode
operation at light load currents to maintain high
efficiency over the entire load current range. The
PFM mode extends the battery life by reducing the
quiescent current to 37 μA (typ) during light load
operation.
In addition, the TPS61256xC device can also support
the pass-through mode by pulling EN to low. In this
mode, the output voltage follows the input voltage
with a voltage drop by the resistance of the inductor
and high-side FET.
The TPS61256xC offers a very small solution size
due to minimum amount of external components. It
allows the use of small inductors and input capacitors
to achieve a small solution size.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS61256xC
DSBGA (9)
1.206 mm × 1.306 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Efficiency vs Load Current
100 VO = 5.0 V
90
80
70
60
50
40
.
30
20
10
0
VI - Input Voltage - V
I O - Output Current - mA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




TPS61256C pdf, 반도체, 판매, 대치품
TPS61256C
SLVSDQ1 – FEBRUARY 2017
7 Specifications
www.ti.com
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Input voltage
Input current
Power dissipation
Temperature
Voltage at VIN(2), VOUT(2), SW(2), EN(2)
Continuous average current into SW (3)
Peak current into SW (4)
Operating, TA (5)
Operating virtual junction, TJ
Storage, Tstg
MIN
MAX
UNIT
–0.3 7
V
1.8
A
3.5
Internally limited
–40 85
–40 150
°C
–65 150
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) All voltages are with respect to network ground terminal.
(3) Limit the junction temperature to 105°C for continuous operation at maximum output power.
(4) Limit the junction temperature to 125°C for 5% duty cycle operation.
(5) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the
maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max)= TJ(max)–(θJA X PD(max)). To achieve optimum performance, it is
recommended to operate the device with a maximum junction temperature of 105°C.
7.2 ESD Ratings
V(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-
C101 (2)
Machine model (MM)
VALUE
±2000
±1000
±200
UNIT
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
7.3 Recommended Operating Conditions
VI Input voltage range
RL Minimum resistive load for start-up
L Inductance
CO Output capacitance
TA Ambient temperature
TJ Operating junction temperature
TPS61256xC
TPS61256xC
MIN NOM MAX UNIT
2.5 4.85 V
10 Ω
0.7 1.0 2.9 µH
3.5 5 50 µF
–40 85 °C
–40 125 °C
7.4 Thermal Information
THERMAL METRIC(1)
TPS61256xC
YFF
UNIT
9 PINS
RθJA
RθJC(top)
RθJB
ψJT
ψJB
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
108.3
1.0
18
4.2
17.9
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
4 Submit Documentation Feedback
Product Folder Links: TPS61256C
Copyright © 2017, Texas Instruments Incorporated

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TPS61256C 전자부품, 판매, 대치품
www.ti.com
8 Parameter Measurement Information
L
1 μH
TPS61256xC
SW VOUT
VIN VIN
CI
4.7 μF
EN GND
TPS61256C
SLVSDQ1 – FEBRUARY 2017
VOUT
CO
10 μF
Copyright © 2017, Texas Instruments Incorporated
Figure 7. Parameter Measurement Schematic
Copyright © 2017, Texas Instruments Incorporated
Product Folder Links: TPS61256C
Submit Documentation Feedback
7

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