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AP7217C 데이터시트 PDF




Diodes에서 제조한 전자 부품 AP7217C은 전자 산업 및 응용 분야에서
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부품번호 AP7217C 기능
기능 1.25V 600mA CMOS LDO
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AP7217C 데이터시트, 핀배열, 회로
AP7217C
1.25V 600mA CMOS LDO
Features
General Description
Very Low Dropout Voltage
Low Current Consumption: Typ. 40µA
Output Voltage: 1.25V
Guaranteed 600mA (min) Output
Input Range up to 5.5V
Current Limiting
Stability with Low ESR Capacitors
Thermal shutdown Protection
Low Temperature Coefficient
SOP-8L-EP: Available in “Green” Molding Compound
(No Br, Sb)
Lead Free Finish / RoHS Compliant (Note 1)
The AP7217C low-dropout linear regulator operates from a 2.5V
to 5.5V supply and delivers a guaranteed 600mA (min)
continuous load current.
The space-saving SOP-8L-EP package is suitable for “pocket”
and hand-held applications.
Applications
CD and MP3 Players
Cellular and PCS Phones
Digital Still Camera
Hand-Held Computers
Typical Application
VIN
CIN
1uF
U1
4 VIN
VOUT 2
AP7217C
GND
7
EN 8
ON
OFF
VOUT
COUT
1uF
AP7217C Rev. 3
DS31424
1 of 9
www.diodes.com
OCTOBER 2009
© Diodes Incorporated




AP7217C pdf, 반도체, 판매, 대치품
AP7217C
1.25V 600mA CMOS LDO
Electrical Characteristics
(TA = 25°C, CIN= 1µF, COUT= 1µF, VEN= VIN, unless otherwise noted)
Symbol
Parameter
Test Conditions
IQ
ISTB
VOUT
Quiescent Current
Standby Current
Output Voltage
Accuracy
VOUT Temperature
Coefficient
IO = 0mA
VEN = Off
VIN = 5.0V
IO = 30mA, VIN = 5V
-40°C to 85°C, IOUT = 30mA
Min Typ. Max
- 40 60
25
Unit
µA
µA
1.225 1.25 1.275 V
±100
ppm / oC
VDROPOUT
IOUT
Dropout Voltage
Maximum Output
Current
IOUT = 100mA, VOUT = 1.25V
IOUT = 600mA, VOUT = 1.25V
VIN = 5.3V
1250
2000
600
mV
mA
ILIMIT
Current Limit
VIN = 5.3V
750 mA
ISHORT
Short Circuit Current VIN = 5.3V
VLINE/VIN/VOUT Line Regulation
4.3V VIN 5.5V; IOUT = 30mA
VOUT
Load Regulation
1mA IOUT 100mA, VIN = 5.3V
70
0.01 ±0.2
10 20
mA
%/V
mV
PSRR
Power Supply
Rejection
VIN = 4.3V+ 0.5Vp-pAC,
IOUT = 50mA
F = 1KHz
55
dB
VEH
VEL
EN Input Threshold
Output ON
Output OFF
IEN Enable Pin Current
θJA
Thermal Resistance
Junction-to-Ambient
SOP-8L-EP (Note 3)
1.6 V
0.25 V
-0.1 0.1 µA
82 ºC/W
θJC
Thermal Resistance
Junction-to-Case
SOP-8L-EP (Note 3)
12 ºC/W
Notes: 3. Test condition for SOP-8L-EP: Device mounted on 2oz copper, minimum recommended pad layout on top & bottom layer with thermal vias,
double sided FR-4 PCB.
AP7217C Rev. 3
DS31424
4 of 9
www.diodes.com
OCTOBER 2009
© Diodes Incorporated

4페이지










AP7217C 전자부품, 판매, 대치품
AP7217C
1.25V 600mA CMOS LDO
Application Note
Input Capacitor
A 1µF ceramic capacitor is recommended to connect between IN
and GND pins to decouple input power supply glitch and noise.
The amount of the capacitance may be increased without limit. A
lower ESR (Equivalent Series Resistance) capacitor allows the
use of less capacitance, while higher ESR type requires more
capacitance. This input capacitor must be located as close as
possible to the device to assure input stability and less noise. For
PCB layout, a wide copper trace is required for both IN and GND.
Output Capacitor
The output capacitor is required to stabilize and help the transient
response of the LDO. The AP7217C is designed to have
excellent transient response for most applications with a small
amount of output capacitance. The AP7217C is stable with any
small ceramic output capacitors of 1.0µF or higher value, and the
temperature coefficients of X7R or X5R type. Additional
capacitance helps to reduce undershoot and overshoot during
transient. For PCB layout, the output capacitor must be placed as
close as possible to OUT and GND pins, and keep the leads as
short as possible.
Thermal Considerations
Thermal Shutdown Protection limits power dissipation in
AP7217C. When the operation junction temperature exceeds
140°C, the Over Temperature Protection circuit starts the thermal
shutdown function and turns the pass element off. The pass
element turn on again after the junction temperature cools by
30°C. For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The power
dissipation definition in device is:
PD = (VIN VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of surroundings
airflow and temperature difference between junctions to ambient.
The maximum power dissipation can be calculated by following
formula:
PD(MAX) = ( TJ(MAX) - TA ) / θJA
Where TJ(MAX) is the maximum operation junction temperature
125°C, TA is the ambient temperature and the θJA is the junction
to ambient thermal resistance.
Vin Iin
IN
OUT
AP7217C
C
GND
Iout Vout
Co
ESR
Iq
ENABLE/SHUTDOWN Operation
The AP7217C (SOP-8L-EP) is turned on by setting the EN pin
high, and is turned off by pulling it low. If this feature is not used,
the EN pin should be tied to IN pin to keep the regulator output on
at all time. To ensure proper operation, the signal source used to
drive the EN pin must be able to swing above and below the
specified turn-on/off voltage thresholds listed in the Electrical
Characteristics section under VIL and VIH.
Current Limit Protection
When output current at OUT pin is higher than current limit
threshold, the current limit protection will be triggered and clamp
the output current to approximately 750mA to prevent
over-current and to protect the regulator from damage due to
overheating.
Short circuit protection
When VOUT pin is shorted to GND or VOUT voltage is less than
200mV, short circuit protection will be triggered and clamp the
output current to approximately 70mA.
AP7217C Rev. 3
DS31424
7 of 9
www.diodes.com
OCTOBER 2009
© Diodes Incorporated

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