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부품번호 | CS5540 기능 |
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기능 | 24-Bit ADC | ||
제조업체 | Crystal | ||
로고 | |||
전체 22 페이지수
CS5540
Low-Power, Low-Voltage, 24 - Bit ∆Σ ADC
Features
l ∆Σ Analog-to-Digital Converter
- Linearity Error: 0.0015% FS
- RMS Noise: 4 µV
l Two Channel Differential MUX
l Buffered, Fully Differential Analog and
Voltage Reference Inputs
l Scalable VREF Input: 0.1 V to Analog Supply
l High Absolute Accuracy via Self-Calibration
l Fixed Digital Filter
- Single Conversion Settling at 6.7 SPS
- Simultaneous 50/60 Hz Rejection
l Simple Serial Interface
- SPITM and MicrowireTM Compatible
- Schmitt Trigger on Serial Clock (SCLK)
l Low Power
- Single +3.0 V Supply
- 330 µA Supply Current
- 10 µA in Sleep Mode
Description
The CS5540 is a low-power and low-voltage ∆Σ ana-
log-to-digital converter (ADC), which achieves highly
accurate conversions using a simple non-programmable
interface that is easy to understand and design-in. It is
optimized to convert analog signals in DC measurement
applications, such as temperature and pressure mea-
surement, and various portable devices where
low-power consumption is required.
To accommodate these applications, the ADC integrates
analog input and reference buffers for increased input
impedance and a two-channel multiplexer.
The CS5540 includes a digital filter, which achieves si-
multaneous rejection of 50/60 Hz signals and provides
single conversion settling at 6.7 SPS throughput. Abso-
lute accuracy is achieved via continuous internal
self-calibration. The device draws a nominal 330 µA.
Low-power, low-voltage operation, and a simple serial
interface make the CS5540 an ideal device for low-cost,
power-conscious DC measurement applications.
ORDERING INFORMATION
CS5540-AS -40 ºC - +85 ºC
16-Pin SSOP
VA+
CHS
AIN1+
AIN1-
AIN2+
AIN2-
Input
Mux
VREF+
VREF-
OSC1 OSC2
X1 X1
X1
Differential
4th Order
∆Σ
Modulator
X1
Clock
Generator
Digital
Filter
VA-
VD+
Serial
Interface
Calibration
Register
Output
Register
DGND
CS
SDO
SCLK
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2000
(All Rights Reserved)
JUN ‘01
DS503PP1
1
CS5540
1. CHARACTERISTICS AND SPECIFICATIONS
ANALOG CHARACTERISTICS (TA = 25 °C; VA+ = +3.0 V ±5%, VA- = 0 V, VD+ = 3.0 V ±5%,
DGND = 0 V, VREF+ = 2.5 V, VREF- = 0 V, MCLK = 32.768 kHz, OWR (Output Word Rate) = 6.7 SPS, Input
Range = ±2.5 V Differential, Vcm=1.25 V. (See Note 1.)
Accuracy
Linearity Error
No Missing Codes
Offset Error
Offset Drift
Full Scale Error
Full Scale Drift
RMS Noise
Bandwidth (-3 dB)
Parameter
Min Typ
Max Units
(Note 2)
(Notes 2 and 3)
(Note 3)
(Notes 4 and 5)
-
24
-
-
-
-
-
-
±0.0015
-
±16
20
±8
1
4
11.96
±0.003
-
TBD
-
±31
-
-
-
%FS
Bits
LSB24
nV/°C
ppm
ppm/°C
µV
Hz
Notes: 1. Specifications guaranteed by design, characterization, and/or test.
2. Specification applies to the device only and does not include any effects caused by external parasitic
thermocouples.
3. Drift over specified temperature range after power-up at 25 °C.
4. Wideband noise aliased into the baseband. Referred to the input. Typical values shown for 25 °C.
5. For peak-to-peak noise multiply the RMS value by 6.6.
* Specifications are subject to change without notice.
4 DS503PP1
4페이지 CS5540
ABSOLUTE MAXIMUM RATINGS (DGND = 0 V; See Note 12.)
Parameter
Symbol
Min Typ Max Units
DC Power Supplies
(Notes 13 and 14)
Positive Digital
Positive Analog
Negative Analog
Input Current, Any Pin Except Supplies (Notes 15 and 16)
Output Current
Power Dissipation
(Note 17)
Analog Input Voltage
AIN and VREF pins
Digital Input Voltage
Ambient Operating Temperature
Storage Temperature
VD+
VA+
VA-
IIN
IOUT
PDN
VINA
VIND
TA
Tstg
-0.3
-0.3
-0.3
-
-
-
(VA-) + (-0.3)
-0.3
-40
-65
- +4.0
- +4.0
- +0.3
V
V
V
- ±10 mA
- ±25 mA
- 500 mW
- (VA+)+0.3 V
- (VD+)+0.3 V
- +85 °C
- +150 °C
Notes: 12. All voltages are measured with respect to the digital ground pin (DGND).
13. VA+ and VA- must satisfy {(VA+) - (VA-)} ≤ +4.0 V.
14. VD+ and VA- must satisfy {(VD+) - (VA-)} ≤ +4.0 V.
15. Applies to all pins including continuous overvoltage conditions at the analog input (AIN) pins.
16. Transient current of up to 100mA will not cause SCR latch-up. Maximum input current for a power
supply pin is ±50 mA.
17. Total power dissipation, including all input currents and output currents.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
DS503PP1
7
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