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부품번호 | EL4511 기능 |
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기능 | Super Sync Separator | ||
제조업체 | Intersil | ||
로고 | |||
전체 24 페이지수
®
Data Sheet
November 12, 2010
EL4511
FN7009.8
Super Sync Separator
The EL4511 sync separator IC is designed for operation in
the next generation of DTV, HDTV, and projector
applications, as well as broadcast equipment and other
applications where video signals need to be processed.
The EL4511 accepts sync on green, separate sync, and H/V
sync inputs, automatically selecting the relevant format. It is
also capable of detecting and decoding tri-level syncs used
with the latest HD systems. Unlike standard sync separators,
the EL4511 can automatically detect the line rate and locks
to it, without the use of an external RSET resistor.
The EL4511 is available in a 24-pin QSOP package and
operates over the full 0°C to 70°C temperature range.
Ordering Information
PART
NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL4511CU
24-Pin QSOP
-
MDP0040
EL4511CU-T7
24-Pin QSOP
7”
MDP0040
EL4511CU-T13 24-Pin QSOP
13”
MDP0040
EL4511CUZ
(See Note)
24-Pin QSOP
(Pb-Free)
-
MDP0040
EL4511CUZ-T7
(See Note)
24-Pin QSOP
(Pb-Free)
7”
MDP0040
EL4511CUZ-T13 24-Pin QSOP
(See Note)
(Pb-Free)
13”
MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Composite, component, HDTV, and PC signal-compatible
• Tri-level & bi-level sync-compatible
• Auto sync detection
• 150kHz max line rate
• Low power
• Small package outline
• 3.3V and 5V operation
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• HDTV/DTV analog inputs
• Video projectors
• Computer monitors
• Set top boxes
• Security video
• Broadcast video equipment
Pinout
EL4511
(24-PIN QSOP)
TOP VIEW
XTAL 1
VBLANK 2
SYNCLOCK 3
PDWN 4
SDENB 5
SCL 6
SDA 7
GNDD1 8
HIN 9
SYNCIN 10
VERTIN 11
LEVEL 12
24 XTALN
23 ODD/EVEN
22 VERTOUT
21 HOUT
20 BACKPORCH
19 SYNCOUT
18 VCCD
17 GNDD2
16 GNDA2
15 VCCA2
14 VCCA1
13 GNDA1
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
Copyright © Intersil Americas Inc. 2002-2005, 2010. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners. Manufactured under U.S. Patent 5,528,303
EL4511
Pin Descriptions
PIN NUMBER
1
2
3
PIN NAME
XTAL
VBLANK
SYNCLOCK
4 PWDN
5 SDENB
6 SCL
7 SDA
8 GNDD1
9 HIN
10 SYNCIN
11 VERTIN
12 LEVEL
13 GNDA1
14 VCCA1
15 VCCA2
16 GNDA2
17 GNDD2
18 VCCD1
19 SYNCOUT
20 BACKPORCH
21 HOUT
22 VERTOUT
23 ODD/EVEN
24 XTALN
PIN TYPE
Input
Logic Output
Logic Output
Logic Input
Logic Input
Logic Input
Logic BIDIR
Power
Input
Input
Input
Output
Power
Power
Power
Power
Power
Power
Logic Output
Logic Output
Logic Output
Logic Output
Logic Output
Output
PIN DESCRIPTION
Crystal input (see Table 2 for details)
Vertical blank output
Indicates that the EL4511 has locked to the line rate and has found three consecutive
“good H lines”
Power-down = hi
Serial interface enable = low
Serial clock
Serial data (input for chip setup, output for diagnostic information)
Digital ground 1
Horizontal sync
Video input, which may incorporate sync signal; connect to Y or G
Vertical sync input
Indicates 2x amplitude of sync tip vs. back porch; referred to ground
Analog ground 1
Analog power supply 1
Analog power supply 2
Analog ground 2
Digital ground 2
Digital power supply 1
Composite sync output
Back porch output
Horizontal sync output
Vertical sync output
Odd-Even field indicator output
Crystal output (see Table 2 for details)
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.4
1.2 1.136W
1
0.8
θJA =8Q8S°CO/PW24
0.6
0.4
0.2
0
0 25 50 75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 1. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.2
1
870mW
0.8
0.6
θJA =1Q1S5°OCP/W24
0.4
0.2
0
0 25 50 75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 2. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
4 FN7009.8
November 12, 2010
4페이지 EL4511
COMPOSITE VIDEO INPUT, BEGINNING OF FIELD ONE
START OF FIELD ONE
622 623 624 625
1
2
3
4
5
6
7
SYNCOUT OUTPUT
VOUT OUTPUT
ODD/EVEN OUTPUT
TVS
23 24
BACKPORCH OUTPUT
HOUT OUTPUT
V BLANK OUTPUT
Notes:
b. The composite sync output reproduces all the video input sync pulses, with a propagation delay.
c. Vertical sync leading edge is coincident with the first vertical serration pulse leading edge, with a propagation delay.
d. Odd-even output is low for even field, and high for odd field.
e. Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses
during vertical, the back porch starts on the rising edge of the serration pulse (with propagation delay).
FIGURE 5. EXAMPLE OF VERTICAL INTERVAL (625)
7 FN7009.8
November 12, 2010
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부품번호 | 상세설명 및 기능 | 제조사 |
EL4511 | Super Sync Separator | Intersil |
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