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PDF TW2826 Data sheet ( Hoja de datos )
| Número de pieza | TW2826 | |
| Descripción | 16 Channel Record Multiplexer | |
| Fabricantes | Intersil | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TW2826 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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16 Channel Record Multiplexer for Security
Applications
TW2826
Features
TW2826 is a record multiplexer that converts multiple
D1 video inputs into quad CIF format for multi-channel
DVR applications. The maximum number of D1 video
that can be accepted is 16. The output can be
selected from any D1 video or quad CIF video.
Description
This product accepts multiple channels BT.656
compliant video data in byte interleaving format,
processes them and outputs them in either its original
size or in quad CIF size based on user control. The
output will be in BT.656 byte interleaving format in
the case of multi-channel output.
Four BT.656 Compliant Input
Maximum Input Rate of 108 MHz with
Byte-Interleaved Format Support
Four BT.656 Compliant Output Ports
Up to 108 MHz Byte-Interleave Output Support
Channel ID Support
User Selectable D1 or Quad CIF Output
Single SDRAM 16 Bits @166MHz
Optional GPIO
Miscellaneous
1.8/3.3V Operation Voltage
Supports 2-wire Serial Bus Interface
144 Ld LQFP Package
Applications
Video Surveillance DVR
Block Diagram
SDRAM
FN7913.0
September 6, 2011
1
V
I
0
V
I
1
V
0
I
2
0V
I
3
0
VIDEO I/F
DRAM
VIDEO O/P
V
CONTROL
FORMATTER
O
VIDEO I/F
VIDEO I/F
VIDEO I/F
LER
MULTIPLEXER
/
AVIgDgErOegaOto/P
rFORMATTER
/
AVIgDgErOegaOto/P
rFORMATTER
/
AVgIDgEreOgOat/Po
rFORMATTER
0
V
O
1V
0O
2
0V
O
/3
Aggregato
FIGURE 1. TW2826 BLOCK DIAGRAM r
0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
TW2826
NAME
VO2_DATA6
VO2_DATA7
VO3_CLK
VO3_DATA0
VO3_DATA1
VO3_DATA2
VO3_DATA3
VO3_DATA4
VO3_DATA5
VO3_DATA6
VO3_DATA7
NUMBER
109
108
107
106
105
104
103
100
99
98
97
TYPE
O
O
O
O
O
O
O
O
O
O
O
DESCRIPTION
Video data output of channel3, bit6/GPIO7
Video data output of channel3, bit7/GPIO8
Video clock output of channel4/GPIO9
Video data output of channel4, bit0/GPIO10
Video data output of channel4, bit1/GPIO11
Video data output of channel4, bit2/GPIO12
Video data output of channel4, bit3/GPIO13
Video data output of channel4, bit4/GPIO14
Video data output of channel4, bit5/GPIO15
Video data output of channel4, bit6/GPIO16
Video data output of channel4, bit7/GPIO17
Memory Interface Pins
NAME
SDR_CLK
SDR_RASB
SDR_CASB
SDR_WEB
SDR_BA0
SDR_BA1
SDR_MA0
SDR_MA1
SDR_MA2
SDR_MA3
SDR_MA4
SDR_MA5
SDR_MA6
SDR_MA7
SDR_MA8
SDR_MA9
SDR_MA10
SDR_MA11
SDR_DQ0
NUMBER
62
72
73
74
71
70
66
65
64
63
53
54
55
56
57
60
67
61
84
TYPE
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
IO
DESCRIPTION
SDRAM clock
SDRAM row address selection
SDRAM column address selection
SDRAM write enable
SDRAM bank0 selection
SDRAM bank1 selection
SDRAM address bus, bit0
SDRAM address bus, bit1
SDRAM address bus, bit2
SDRAM address bus, bit3
SDRAM address bus, bit4
SDRAM address bus, bit5
SDRAM address bus, bit6
SDRAM address bus, bit7
SDRAM address bus, bit8
SDRAM address bus, bit9
SDRAM address bus, bit10
SDRAM address bus, bit11
SDRAM data bus, bit0
5
5 Page 
TW2826
The outside SDRAM component provide frame buffers for video multiplex processing, in the case of only aggregating
video data directly from 16 video input D1 data (not doing any video multiplexing from input D1 video into Quad CIF
D1 video), the TW2826 can run without SDRAM.
Video Output
The video output formatter/aggregator engine can aggregate up to four channels video data into one VO port, the
data source can be from 16 video input D1 data, or from 4 video multiplex engines (Quad CIF), the configuration is
very flexible, you almost can aggregate any of these 20 video sources in any combination.
There are four physical video output ports, each port has its own video output clock, and the clock can be configured
into eight different phase delay to its corresponding video output data.
The TW2826 supports a standard ITU-R BT.656 format. To unify our design, the fourth sync word always carry the
channel ID information, even in 27MHz single channel case, that means we don’t support sync word CRC mechanism
in our video output format.
ITU-R BT.656 FORMAT
In ITU-R BT.656 format, SAV and EAV sequences are inserted into the data stream to indicate the active video time.
The output timing is illustrated in Figure 3. The SAV and EAV sequences are shown in Table 1.
CLKP
VD[7:0] FFh 00h 00h XY 80h 16h
HACIVE
EAV code
80h 160h FFh 00h 00h XY Cb0 Y0 Cr0 Y1 Cb2 Y2 Cr2 Y3
SAV code
FIGURE 3. TIMING DIAGRAM OF ITU-R BT.656 FORMAT
FIELD
EVEN
EVEN
EVEN
EVEN
ODD
ODD
ODD
ODD
CONDITION
V TIME
Blank
Blank
Active
Active
Blank
Blank
Active
Active
TABLE 1. ITU-R BT.656 SAV AND EAV CODE SEQUENCE
656 FVH VALUE
SAV/EAV CODE SEQUENCE
H TIME
EAV
SAV
EAV
SAV
EAV
SAV
EAV
SAV
FVH
111
110
101
100
011
010
001
000
FIRST
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
SECOND
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
THIRD
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
FOURTH
0xF0
0xE0
0xD0
0xC0
0xB0
0xA0
0x90
0x80
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TW2826.PDF ] | |
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