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부품번호 | ISL22444 기능 |
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기능 | Quad Digitally Controlled Potentiometer | ||
제조업체 | Intersil | ||
로고 | |||
전체 19 페이지수
NOT RECOMMENDED FOR NEW DESIGNS
RECOMMENDED REPLACEMENT PART
ISL22424
ISL22444
Quad Digitally Controlled Potentiometer (XDCP™)
Data Sheet
May 24, 2007
FN6426.0
Low Noise, Low Power, SPI® Bus, 256 Taps
The ISL22444 integrates four digitally controlled
potentiometers (DCP), control logic and non-volatile memory
on a monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
wipers position is controlled by the user through the SPI
serial interface. Each potentiometer has an associated
volatile Wiper Register (WRi) and a non-volatile Initial Value
Register (IVRi) that can be directly written to and read by the
user. The contents of the WRi control the position of the
wiper. At power-up the device recalls the contents of the
DCP’s IVRi to the corresponding WRi.
The ISL22444 also has 11 General Purpose non-volatile
registers that can be used as storage of lookup table for
multiple wiper position or any other valuable information.
The ISL22444 features a dual supply that is beneficial for
applications requiring a bipolar range for DCP terminals
between V- and VCC.
Each DCP can be used as three-terminal potentiometer or
as two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
• Four potentiometers in one package
• 256 resistor taps
• SPI serial interface with write/read capability
• Daisy Chain Configuration
• Shutdown mode
• Non-volatile EEPROM storage of wiper position
• 11 General Purpose non-volatile registers
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T 55°C
• Wiper resistance: 70 typical @ 1mA
• Standby current <4µA max
• Shutdown current <4µA max
• Dual power supply
- VCC = 2.25V to 5.5V
- V- = -2.25V to -5.5V
• 10k 50kor 100k total resistance
• Extended industrial temperature range: -40 to +125°C
• 20 Ld TSSOP or 20 Ld QFN
• Pb-free plus anneal product (RoHS compliant)
Ordering Information
PART NUMBER
(Notes 1, 2)
ISL22444TFV20Z
PART MARKING
22444 TFVZ
RESISTANCE
OPTION (k)
100
TEMPERATURE
RANGE (°C)
-40 to +125
PACKAGE
(Pb-free)
20 Ld TSSOP
PKG. DWG. #
M20.173
ISL22444TFR20Z
22444 TFRZ
100
-40 to +125
20 Ld QFN
L20.5x5
ISL22444UFV20Z
22444 UFVZ
50
-40 to +125
20 Ld TSSOP
M20.173
ISL22444UFR20Z
22444 UFRZ
50
-40 to +125
20 Ld QFN
L20.5x5
ISL22444WFV20Z
22444 WFVZ
10
-40 to +125
20 Ld TSSOP
M20.173
ISL22444WFR20Z
22444 WFRZ
10
-40 to +125
20 Ld QFN
L20.5x5
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-TK” suffix for 1,000 Tape and Reel option
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL22444
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to 0.3V
Voltage at any DCP pin with Respect to GND . . . . . . . . . . V- to VCC
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C
ESD
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400V
Thermal Information
Thermal Resistance (Typical, Note 3)
JA (°C/W)
20 Lead TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
20 Lead QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Full Industrial) . . . . . . . . . . . .-40°C to +125°C
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.25V to 5.5V
V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.25V to -5.5V
Max Wiper Current Iw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Analog Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
RTOTAL RHi to RLi resistance
W option
U option
T option
RHi to RLi resistance tolerance
End-to-End Temperature Coefficient W option
U, T option
VRH, VRL
RW
DCP terminal voltage
Wiper resistance
CH/CL/CW Potentiometer capacitance
(Note 20)
VRHi and VRLi to GND
RH - floating, VRL = V-, force Iw current to
the wiper, IW = (VCC - VRL)/RTOTAL
See “DCP Macro Model” on page 8.
ILkgDCP Leakage on DCP pins
Voltage at pin from V- to VCC
VOLTAGE DIVIDER MODE (V- @ RLi; VCC @ RHi; measured at RWi, unloaded)
INL Integral non-linearity
(Note 9)
W option
U, T option
DNL
Differential non-linearity
(Note 8)
Monotonic over all tap positions,
W option
U, T option
ZSerror
(Note 6)
FSerror
(Note 7)
VMATCH
(Note 10)
Zero-scale error
Full-scale error
DCP to DCP matching
TCV Ratiometric temperature coefficient
(Note 11, 20)
W option
U, T option
W option
U, T option
Wipers at the same tap position, the same
voltage at all RH terminals and the same
voltage at all RL terminals
DCP register set to 80 hex
TYP
MIN (NOTE 4) MAX
10
50
100
-20 +20
±85
±45
V- VCC
70 250
10/10/25
0.1 1
UNIT
k
k
k
%
ppm/°C
ppm/°C
V
pF
µA
-1.5 ±0.5
1.5 LSB
(Note 5)
-1.0 ±0.2
1.0 LSB
(Note 5)
-1.0 ±0.4
1.0 LSB
(Note 5)
-0.5 ±0.15 0.5
LSB
(Note 5)
0 1 5 LSB
0 0.5 2 (Note 5)
-5 -1 0 LSB
-2 -1 0 (Note 5)
-2 2 LSB
(Note 5)
±4 ppm/°C
4 FN6426.0
May 24, 2007
4페이지 ISL22444
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 4) MAX
UNIT
Cpin SCK, SDI, SDO and CS pin
(Note 20) capacitance
10 pF
fSCK
tCYC
tWH
tWL
tLEAD
tLAG
tSU
tH
tRI
tFI
tDIS
tSO
tV
tHO
tRO
tFO
tCS
NOTES:
SPI frequency
SPI clock cycle time
SPI clock high time
SPI clock low time
Lead time
Lag time
SDI, SCK and CS input setup time
SDI, SCK and CS input hold time
SDI, SCK and CS input rise time
SDI, SCK and CS input fall time
SDO output Disable time
SDO output setup time
SDO output valid time
SDO output hold time
SDO output rise time
SDO output fall time
CS deselect time
Rpu = 2k, Cbus = 30pF
Rpu = 2k, Cbus = 30pF
5 MHz
200 ns
100 ns
100 ns
250 ns
250 ns
50 ns
50 ns
10 ns
10 20 ns
0 100 ns
50 ns
150 ns
0 ns
60 ns
60 ns
2 µs
4. Typical values are for TA = +25°C and 3.3V supply voltage.
5. LSB: [V(RW)255 – V(RW)0]/255. V(RW)255 and V(RW)0 are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
6. ZS error = V(RW)0/LSB.
7. FS error = [V(RW)255 – VCC]/LSB.
8. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 255. i is the DCP register setting.
9. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 255
10. VMATCH= [V(RWx)i -V(RWy)i]/LSB, for i = 0 to 255, x = 0 to 3, y = 0 to 3.
11.
TCV
=
-------M-----a----x------V-------R-----W--------i-----–-----M-----i--n------V-------R-----W--------i--------
MaxVRWi + MinVRWi 2
+1----61---50----°6--C---
for i = 16 to 255 decimal,
voltage and Min ( ) is the
T = -40°C
minimum
to +125°C. Max (
value of the wiper
) is the maximum value of the wiper
voltage over the temperature range.
12. MI = |RW255 – RW0|/255. MI is a minimum increment. RW255 and RW0 are the measured resistances for the DCP register set to FF hex and
00 hex respectively.
13. Roffset = RW0/MI, when measuring between RW and RL.
Roffset = RW255/MI, when measuring between RW and RH.
14. RDNL = (RWi – RWi-1)/MI -1, for i = 1 to 255.
15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 255.
16. RMATCH= [(Rx)i -(Ry)i]/MI, for i = 0 to 255, x = 0 to 3, y = 0 to 3.
17.
TCR =
-------M-----a----x------R-----i-----–-----M-----i--n------R-----i--------
MaxRi + MinRi 2
+1----61---5-0---°6--C---
for i = 16 to 255, T = -40°C to +125°C. Max ( ) is the maximum value of the resistance
is the minimum value of the resistance over the temperature range.
and Min ( )
18. tWC is the time from the end of a Write sequence of SPI serial interface, to the end of the self-timed internal non-volatile write cycle.
19. Rpu is specified for the highest data rate transfer for the device. Higher value pull-up can be used at lower data rates.
20. This parameter is not 100% tested.
7 FN6426.0
May 24, 2007
7페이지 | |||
구 성 | 총 19 페이지수 | ||
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부품번호 | 상세설명 및 기능 | 제조사 |
ISL22444 | Quad Digitally Controlled Potentiometer | Intersil |
ISL22446 | Quad Digitally Controlled Potentiometer | Intersil Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |