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부품번호 | ACT4050 기능 |
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기능 | Wide Input 3.5A Step Down Converter | ||
제조업체 | Active-Semi | ||
로고 | |||
전체 13 페이지수
Active-Semi
ACT4050
Rev 2, 01-Jul-11
Wide Input 3.5A Step Down Converter
FEATURES
• 3.5A Output Current
• Up to 96% Efficiency
• 4.5V to 15V Input Range
• 12µA Shutdown Supply Current
• 400kHz Switching Frequency
• Adjustable Output Voltage From 0.817V
• Cycle-by-Cycle Current Limit Protection
• Thermal Shutdown Protection
• Frequency Fold-Back at Short Circuit
• Stability with Wide Range of Capacitors,
Including Low ESR Ceramic Capacitors
• SOP-8/EP (Exposed Pad) Package
APPLICATIONS
• Digital TV
• Portable DVDs
• Car-Powered or Battery-Powered Equipments
• Set-Top Boxes
• Telecom Power Supplies
• Consumer Electronics
GENERAL DESCRIPTION
The ACT4050 is a current-mode step-down DC/DC
converter that provides up to 3.5A of output current
at 400kHz switching frequency. The device utilizes
Active-Semi’s proprietary high voltage process for
operation with input voltages up to 15V.
The ACT4050 provides fast transient response and
eases loop stabilization while providing excellent
line and load regulation. This device features a very
low ON-resistance power MOSFET which provides
peak operating efficiency up to 96%. In shutdown
mode, the ACT4050 consumes only 12μA of supply
current.
This device also integrates protection features
including cycle-by-cycle current limit, thermal
shutdown and frequency fold-back at short circuit.
The ACT4050 is available in a SOP-8/EP (Exposed
Pad) package and requires very few external
devices for operation.
TYPICAL APPLICATION CIRCUIT
Efficiency vs. Load Current
100
VIN = 7V
90
VIN = 12V
80
70
60
50 VOUT = 5V
0 500 1000 1500 2000 2500 3000 3500
Load Current (mA)
Innovative PowerTM
- 1 - www.active-semi.com
Copyright © 2011 Active-Semi, Inc.
Active-Semi
FUNCTIONAL BLOCK DIAGRAM
ACT4050
Rev 2, 01-Jul-11
FUNCTIONAL DESCRIPTION
As seen in Functional Block Diagram, the ACT4050
is a current mode pulse width modulation (PWM)
converter. The converter operates as follows:
A switching cycle starts when the rising edge of the
Oscillator clock output causes the High-Side Power
Switch to turn on and the Low-Side Power Switch to
turn off. With the SW side of the inductor now
connected to IN, the inductor current ramps up to
store energy in the magnetic field. The inductor
current level is measured by the Current Sense
Amplifier and added to the Oscillator ramp signal. If
the resulting summation is higher than the COMP
voltage, the output of the PWM Comparator goes
high. When this happens or when Oscillator clock
output goes low, the High-Side Power Switch turns
off and the Low-Side Power Switch turns on. At this
point, the SW side of the inductor swings to a diode
voltage below ground, causing the inductor current
to decrease and magnetic energy to be transferred
to output. This state continues until the cycle starts
again.
The High-Side Power Switch is driven by logic using
BS as the positive rail. This pin is charged to VSW + 6V
when the Low-Side Power Switch turns on.
The COMP voltage is the integration of the error
between FB input and the internal 0.817V
reference. If FB is lower than the reference voltage,
COMP tends to go higher to increase current to the
output. Current limit happens when COMP reaches
its maximum clamp value of 2.15V.
The Oscillator normally switches at 400kHz.
However, if FB voltage is less than 0.7V, then the
switching frequency decreases until it reaches a
typical value of 60kHz at VFB = 0.5V.
Shutdown Control
The ACT4050 EN pin contains a precision 1.1V
comparator with 100mV hysteresis, as well as a
2µA pull-up current source. This combination can
be used to control the on/off operation of
ACT4050 using several methods:
1) First, "always-on" operation can be enabled
simply by floating the EN pin. Any time power is
applied to VIN, the EN pull-up current source will
bring the pin above 1.1V and enable the IC. In
this case, under-voltage lockout will be controlled
by an internal 4.2V comparator on VIN.
2) Second, an open-drain or open-collector logic
device can be used to pull the EN pin low to
provide digital ON/OFF control. When the logic
pull-down is disabled, the internal 2µA pull-up
current will bring the EN pin high and enable the
chip.
3) Third, a known startup delay time can be created
by adding a small capacitor from EN to GND in
Innovative PowerTM
- 4 - www.active-semi.com
Copyright © 2011 Active-Semi, Inc.
4페이지 Active-Semi
ACT4050
Rev 2, 01-Jul-11
STABILITY COMPENSATION
Figure 2:
Stability Compensation
COMP
ACT4050
CCOMP
RCOMP
CCOMP2c
c: CCOMP2 is needed only for high ESR output capacitor
The feedback loop of the IC is stabilized by the
components at the COMP pin, as shown in Figure 2.
The DC loop gain of the system is determined by
the following equation:
AVDC
0 .82 V
= IOUT
AVEA G COMP
The dominant pole P1 is due to CCOMP:
fP1
=
G EA
2π AVEA C COMP
(7)
(8)
The second pole P2 is the output pole:
fP 2
=
I OUT
2πVOUT C OUT
(9)
The first zero Z1 is due to RCOMP and CCOMP:
fZ1
=
1
2 πR COMP
C COMP
(10)
And finally, the third pole is due to RCOMP and
CCOMP2 (if CCOMP2 is used):
fP3
=
1
2πRCOMP CCOMP2
(11)
The following steps should be used to compensate
the IC:
STEP 1. Set the cross over frequency at 1/10 of the
switching frequency via RCOMP:
R COMP
=
2πVOUT COUT fSW
10 GEAGCOMP × 0.82V
= 1 .88
× 10
V8
OUT
C OUT
(Ω)
(12)
but limit RCOMP to 15kΩ maximum.
STEP 2. Set the zero fZ1 at 1/4 of the cross over
frequency. If RCOMP is less than 15kΩ, the equation
for CCOMP is:
CCOMP
=
1.6 ×10
RCOMP
−5
(F) (13)
If RCOMP is limited to 15kΩ, then the actual cross
over frequency is 3.4 / (VOUTCOUT). Therefore:
CCOMP = 1.2 ×10 −5VOUTCOUT
(F) (14)
STEP 3. If the output capacitor’s ESR is high
enough to cause a zero at lower than 4 times the
cross over frequency, an additional compensation
capacitor CCOMP2 is required. The condition for using
CCOMP2 is:
R ESRCOUT
≥
Min
⎜⎜⎝⎛
1
.1 ×10
COUT
−6
,0.012
× VOUT
⎟⎟⎠⎞
(Ω)
(15)
And the proper value for CCOMP2 is:
CCOMP 2
=
C ROUT ESRCOUT
RCOMP
(16)
Though CCOMP2 is unnecessary when the output
capacitor has sufficiently low ESR, a small value
CCOMP2 such as 100pF may improve stability against
PCB layout parasitic effects.
Table 3 shows some calculated results based on
the compensation method above.
Table 2:
Typical Compensation for Different Output
Voltages and Output Capacitors
VOUT
2.5V
3.3V
5V
2.5V
3.3V
5V
2.5V
3.3V
5V
COUT
2x22μF Ceramic
2x22μF Ceramic
2x22μF Ceramic
47μF SP CAP
47μF SP CAP
47μF SP CAP
470μF/6.3V/30mΩ
470μF/6.3V/30mΩ
470μF/6.3V/30mΩ
RCOMP
8.2kΩ
12kΩ
15kΩ
15kΩ
15kΩ
15kΩ
15kΩ
15kΩ
15kΩ
CCOMP
2.2nF
1.5nF
1.5nF
1.5nF
1.8nF
2.7nF
15nF
22nF
27nF
CCOMP2c
None
None
None
None
None
None
1nF
1nF
None
c: CCOMP2 is needed for high ESR output capacitor.
Figure 3 shows an example ACT4050 application circuit
generating a 2.5V/3.5A output.
Innovative PowerTM
- 7 - www.active-semi.com
Copyright © 2011 Active-Semi, Inc.
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부품번호 | 상세설명 및 기능 | 제조사 |
ACT4050 | Wide Input 3.5A Step Down Converter | Active-Semi |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |