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PDF AOZ3010PI Data sheet ( Hoja de datos )

Número de pieza AOZ3010PI
Descripción 2A Synchronous Buck Regulator
Fabricantes ALPHA & OMEGA 
Logotipo ALPHA & OMEGA Logotipo



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AOZ3010PI
EZBuck™ 2 A Synchronous Buck Regulator
General Description
The AOZ3010PI is a high efficiency, simple to use, 2 A
synchronous buck regulator. The AOZ3010PI operates
from a 4.5 V to 18 V input voltage range, and provides up
to 2 A of continuous output current with an output voltage
adjustable down to 0.8 V.
The AOZ3010PI comes in an exposed pad SO-8
package and is rated over a -40 °C to +85 °C operating
ambient temperature range.
Features
4.5 V to 18 V operating input voltage range
80 minternal high-side switch and 50 minternal
low-side switch (at 12 V)
Up to 95 % efficiency
External soft start
Output voltage adjustable down to 0.8 V
2 A continuous output current
500 kHz PWM operation
Cycle-by-cycle current limit
Pre-bias start-up
Short-circuit protection
Thermal shutdown
Exposed pad SO-8 package
Applications
Point of load DC/DC conversion
LCD TVs
Set top boxes
DVD and Blu-ray players/recorders
Cable modems
Typical Application
VIN
C1
10µF
Rc
Cc
Css
VIN SS
EN
LX
AOZ3010PI
COMP
AGND
FB
PGND
L1 4.7µH
VOUT
R1
C2, C3
22µF
R2
Figure 1. 3.3 V, 2 A Synchronous Buck Regulator, Fs = 500 kHz
Rev. 0.5 December 2012
www.aosmd.com
Page 1 of 14

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AOZ3010PI pdf
AOZ3010PI
Typical Performance Characteristics
Circuit of Figure 1. TA = 25 °C, VIN = VEN = 12 V, VOUT = 3.3 V unless otherwise specified.
Light Load Operation
Full Load Operation
Vin ripple
0.2V/div
Vo ripple
0.2V/div
VLX
10V/div
2µs/div
Start Up to Full Load
IL
2A/div
Vin
5V/div
2µs/div
Short Circuit Protection
Vin ripple
0.5V/div
Vo ripple
0.2V/div
VLX
10V/div
IL
2A/div
Vo
2V/div
Vo
2V/div
1ms/div
50% to 100% Load Transient
10ms/div
Short Circuit Recovery
VLX
10V/div
IL
2A/div
Vo
2V/div
100µs/div
Vo ripple
0.2V/div
Io
2A/div
10ms/div
VLX
10V/div
IL
2A/div
Rev. 0.5 December 2012
www.aosmd.com
Page 5 of 14

5 Page





AOZ3010PI arduino
Layout Considerations
The AOZ3010PI is an exposed pad SO-8 package.
Several layout tips are listed below for the best electric
and thermal performance.
1. The exposed pad (LX) is connected to internal PFET
and NFET drains. Connected a large copper plane to
LX pin to help thermal dissipation.
2. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to the
PGND pin and the VIN pin to help thermal dissipa-
tion.
3. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
4. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise cou-
pling to the AGND pin.
5. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
6. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
7. Keep sensitive signal trace far away form the LX pad.
AOZ3010PI
Rev. 0.5 December 2012
www.aosmd.com
Page 11 of 14

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