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W78E58 데이터시트 PDF




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부품번호 W78E58 기능
기능 8 BIT MICROCONTROLLER
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W78E58 데이터시트, 핀배열, 회로
W78E58
GENERAL DESCRIPTION
8-BIT MICROCONTROLLER
The W78E58 is an 8-bit microcontroller that is functionally compatible with the W78C58, except that
the mask ROM is replaced by a flash EEPROM with a size of 32 KB. To facilitate programming and
verification, the flash EEPROM inside the W78E58 allows the program memory to be programmed
and read electronically. Once the code is confirmed, the user can protect the code for security.
The W78E58 microcontroller supplies a wider frequency range than most 8-bit microcontrollers on the
market. It is functionally compatible with the industry-standard 80C52 microcontroller series, except
that one extra 4-bit bit-addressable I/O port(Port 4) and two additional external interrupts (INT2 ,
INT3 ).
The W78E58 contains four 8-bit bi-directional and bit-addressable I/O ports, three 16-bit
timer/counters, and a serial port. These peripherals are supported by a eight-source, two-level
interrupt capability. There are 256 bytes of RAM and an 32 KB flash EEPROM for application
programs.
The W78E58 microcontroller has two power reduction modes, idle mode and power-down mode, both
of which are software selectable. The idle mode turns off the processor clock but allows for continued
peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
FEATURES
8-bit CMOS microcontroller
Fully static design
Low standby current at full supply voltage
DC-40 MHz operation
256 bytes of on-chip scratchpad RAM
32 KB electrically erasable/programmable EPROM
64 KB program memory address space
64 KB data memory address space
Four 8-bit bidirectional ports
One extra 4-bit bit-addressable I/O port, additional INT2 / INT3
(available on 44-pin PLCC/QFP package)
Three 16-bit timer/counters
One full duplex serial port
Boolean processor
Eight-source, two-level interrupt capability
Built-in power management
Code protection mechanism
Packages:
DIP 40: W78E58-16/24/40
PLCC 44: W78E58P-16/24/40
QFP 44: W78E58F-16/24/40
TQFP 44: W78E58M-16/24/40
Publication Release Date: November 1997
- 1 - Revision A2




W78E58 pdf, 반도체, 판매, 대치품
W78E58
Flash No function in this mode.
EA/VPP
MODE
Normal
Flash
RST
MODE
Normal
Flash
DESCRIPTION
EA , External Access, Input, active low.
This pin forces the processor to execute a program from the external ROM. When the
internal flash EEPROM is accessed as in the W78C58, this pin should be kept high.
VPP, Program Power supply pin, Input.
This pin accepts the high voltage (12V) needed for programming the flash EEPROM.
DESCRIPTION
RST, Reset, Input, active high.
This pin resets the processor. It must be kept high for at least two machine cycles in
order to be recognized by the processor.
Flash mode configuration pin, Input, active high.
RST is used to configure the flash operations. For details, see Flash Operations.
ALE
MODE
Normal
Flash
DESCRIPTION
ALE, Address Latch Enable, Output, active high.
ALE is used to enable the address latch that separates the address from the data on
Port 0. ALE runs at 1/6th of the oscillator frequency. A single ALE pulse is skipped
during external data memory accesses. ALE goes to a high impedance state with a
weak pull-up during reset state.
Flash mode configuration pin, Input, active low.
ALE is used to configure the flash operations. For details, see Flash Operations.
PSEN
MODE
Normal
Flash
DESCRIPTION
PSEN, Program Store Enable, Output, active low.
This pin enables the external ROM onto the Port 0 address/data bus during fetch and
MOVC operations. PSEN goes to a high impedance state with a weak pull-up during
reset state
Flash mode configuration pin, Input, active high.
PSEN is used to configure the flash operations. For details, see Flash Operations.
XTAL1
MODE
DESCRIPTION
-4-

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W78E58 전자부품, 판매, 대치품
W78E58
FUNCTIONAL DESCRIPTION
The W78E58 architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 256 bytes of RAM, three timer/counters, and a serial port. The processor supports
111 different opcodes and references both a 64K program address space and a 64K data storage
space.
Timers 0, 1, and 2
Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0,
TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide
control functions for timers 0 and 1. The T2CON register provides control functions for Timer 2.
RCAP2H and RCAP2L are used as reload/capture registers for Timer 2.
The operations of Timer 0 and Timer 1 are the same as in the W78C51. Timer 2 is a special feature
of the W78E58: it is a 16-bit timer/counter that is configured and controlled by the T2CON register.
Like Timers 0 and 1, Timer 2 can operate as either an external event counter or as an internal timer,
depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating modes: capture, auto-
reload, and baud rate generator. The clock speed at capture or auto-reload mode is the same as that
of Timers 0 and 1.
Clock
The W78E58 is designed to be used with either a crystal oscillator or an external clock. Internally, the
clock is divided by two before it is used. This makes the W78E58 relatively insensitive to duty cycle
variations in the clock.
Crystal Oscillator
The W78E58 incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must be
connected across pins XTAL1 and XTAL2. In addition, a load capacitor must be connected from each
pin to ground, and a resistor must also be connected from XTAL1 to XTAL2 to provide a DC bias
when the crystal frequency is above 24 MHz.
External Clock
An external clock should be connected to pin XTAL1. Pin XTAL2 should be left unconnected. The
XTAL1 input is a CMOS-type input, as required by the crystal oscillator. As a result, the external clock
signal should have an input one level of greater than 3.5 volts.
Power Management
Idle Mode
The idle mode is entered by setting the IDL bit in the PCON register. In the idle mode, the internal
clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The
processor will exit idle mode when either an interrupt or a reset occurs.
Power-down Mode
When the PD bit of the PCON register is set, the processor enters the power-down mode. In this
mode all of the clocks are stopped, including the oscillator. The only way to exit power-down mode is
by a reset.
Publication Release Date: November 1997
- 7 - Revision A2

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