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PDF IAM-91563 Data sheet ( Hoja de datos )

Número de pieza IAM-91563
Descripción 3V Downconverter
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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IAM-91563
0.8–6 GHz 3V Downconverter
Data Sheet
Description
Avago’s IAM-91563 is an economical 3V GaAs MMIC mixer
used for frequency down-conversion. RF frequency cover-
age is from 0.8 to 6 GHz and IF ­coverage is from 50 to 700
MHz. Packaged in the SOT-363 ­package, this 4.0 sq. mm.
package requires half the board space of a SOT-143 and
only 15% the board space of an SO‑8 package.
At 1.9 GHz, the IAM-91563 ­ provides 9 dB of conversion
gain, thus eliminating an RF or IF gain stage normally
needed with a lossy mixer. LO drive power is nominally
only -5 dBm, eliminating an LO buffer amplifier. The 8.5 dB
noise figure is low enough to allow the system to use a
low cost LNA. The
system linearity for
-m6 odsBt mcomInmpuetrcIiPa3l ­
provides adequate
applications, but is
adjustable to 0 dBm.
The circuit uses GaAs PHEMT technology with proven reli-
ability, and uniformity. The MMIC ­consists of a cascode FET
structure that provides unbalanced gm modulation type
mixing. An on-chip LO buffer amp drives the mixer while
bias circuitry allows a single +3V supply (through a choked
IF port). The LO port is internally matched to 50 Ω. The
RF and IF ports are high impedance and require external
matching networks.
Surface Mount Package: SOT-363 (SC-70)
Pin Connections and Package Marking
MGA-86563 Pkg
LO 1
6 IF and Vd
GND 2
5 GND
RF 3
4 SOURCE
BYPASS
Note:
1. Package marking provides orientation and identification.
Features
Lead-free Option Available
+0 dBm Input IP3 at 1.9 GHz
Single +3V Supply
8.5 dB SSB Noise Figure at 1.9 GHz
9.0 dB Conversion Gain at 1.9 GHz
Ultra-miniature Package
Applications
Downconverter for PCS, PHS, ISM, WLL, and other
Wireless Applications
Attention: Observe precautions for
handling electrostatic ­sensitive devices.
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Simplified Schematic
LO
1
RF
3
IF and Vd
6
SOURCE
BYPASS
4
GROUND
2, 5


1 page




IAM-91563 pdf
IAM-91563 Typical Reflection Coefficients, TC=25°C, ZO = 50 Ω, Vd=3 V
Frequency (GHz)
RF (Mag)
RF (Ang)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.91 -18
0.9 0.91 -21
1 0.91 -23
1.1 0.92 -25
1.2 0.91 -28
1.3 0.88 -29
1.4 0.87 -32
1.5 0.85 -33
1.6 0.84 -34
1.7 0.83 -35
1.8 0.82 -37
1.9 0.82 -37
2 0.81 -39
2.1 0.81 -40
2.2 0.81 -41
2.3 0.81 -42
2.4 0.81 -44
2.5 0.80 -45
2.6 0.80 -45
2.7 0.81 -46
2.8 0.81 -48
2.9 0.81 -50
3 0.82 -51
3.1 0.83 -53
3.2 0.83 -55
3.3 0.83 -56
3.4 0.85 -59
3.5 0.86 -61
3.6 0.87 -64
3.7 0.85 -67
3.8 0.83 -71
3.9 0.83 -71
4 0.82 -73
4.1 0.83 -76
4.2 0.83 -79
4.3 0.84 -82
4.4 0.84 -85
4.5 0.84 -87
4.6 0.85 -91
4.7 0.84 -95
4.8 0.85 -97
4.9 0.85 -100
5 0.85 -103
5.1 0.86 -106
5.2 0.85 -108
5.3 0.84 -113
5.4 0.84 -115
5.5 0.84 -117
5.6 0.83 -121
5.7 0.83 -123
5.8 0.81 -125
5.9 0.81 -128
6 0.80 -130
LO (Mag)
0.43
0.39
0.39
0.39
0.39
0.39
0.40
0.39
0.39
0.38
0.39
0.39
0.40
0.39
0.39
0.39
0.39
0.39
0.38
0.39
0.38
0.38
0.37
0.37
0.36
0.36
0.35
0.35
0.34
0.34
0.33
0.33
0.32
0.32
0.31
0.32
0.31
0.30
0.30
0.29
0.29
0.28
0.29
0.27
0.28
0.26
0.28
0.25
0.27
0.25
0.27
0.25
0.27
0.25
0.27
0.25
0.27
0.25
0.26
0.24

LO (Ang)
IF (Mag)
-1 0.64
-6 0.63
-8 0.63
-9 0.63
-10 0.62
-11 0.62
-14 0.62
-14
-16
-17
-17
-19
-22
-22
-24
-25
-26
-27
-29
-29
-31
-31
-32
-33
-34
-35
-36
-36
-37
-37
-38
-39
-39
-40
-40
-42
-42
-45
-43
-46
-45
-47
-48
-49
-50
-51
-52
-52
-54
-54
-57
-56
-58
-58
-61
-61
-64
-65
-67
-65
IF (Ang)
-8
-9
-10
-10
-11
-12
-13

5 Page





IAM-91563 arduino
Adding a shunt capacitance (C2) of 11.3 pF brings the im-
pedance to Point B. The match to Point C at the center of
the chart is completed with a series inductance (L2) of 150
nH.
Although not necessary for many applications, the match
at the LO port can be improved by the addition of series
inductor L3 with a value of approximately 8 nH. Design in-
ftohremtaatbioleno(Γf LROe) ffloercmtioantcChoinegffitchieenLtOs.
port is obtained
Capacitor C7 is
from
a DC
block for the LO port.
DC bias is applied to the IAM‑91563 through the RFC at
the IF Output pin. The power supply is bypassed to ground
with capacitor C5 to keep RF, IF, and LO signals off of the
DC bias lines and to prevent gain dips or peaks in the re-
sponse of the mixer. C4 is a DC blocking capacitor for the
output.
The values of the RF bypass capacitors and DC blocking
capacitors that are not part of a impedance matching
structure (i.e., C3 - C7) should be chosen to provide a small
reactance (typically < 5 ohms) at the lowest frequency at
the port for which they are used. The reactance of the RF
choke (RFC) should be high (e.g., several hundred ohms)
at the lowest IF.
The completed 1.9 GHz mixer from the design example
above with all components and SMA connectors in place
is shown in Figure 32. Again, L1 is not used and is replaced
by a metal tab. The length of the shunt transmission line,
MLIN, is adjustable by moving the position of the short-
ing tab between the line and the ground pad. Provision is
made for an additional bypass capacitor, C6, to be added
twoatnhteedbRiaFsfeliendebnaecakrththroeuVgdhcboinanselicnteios.n to eliminate un-
When multiple bypass capacitors are used, consideration
should be given to potential resonances. It is important
to ensure that the capacitors, when combined with addi-
tional parasitic L’s and C’s on the circuit board, do not form
resonant circuits. The addition of a small value resistor in
the bias supply line between bypass capacitors will often
“de-Q” the bias circuit and eliminate resonance effects.
Table 1 summarizes the component values for the 1.9 GHz
design.
Table 1. Component Values for 1.9 GHz Downconverter.
Component
Value
C1
C2
C3, C5, C7
C4
L1
L2
L3
MLIN
RFC
0.5 pF
9 pF
100 pF
500 pF
(not used)
100 nH
8.2 nH
Zo=90 Ω
l = 0.41 in.
320 nH
The values shown in Table 1 may vary from those used
above to describe the basic impedance matching ap-
proach. The final component values take into consider-
ation additional effects such as, the various line lengths
between components, parasitics in components (e.g., the
series inductance in C1), as well as other circuit parasitics.
A CAD program such as Avago Touchstone® may be used
to fully analyze and account for these circuit ­variables.
LO
C7
RF L3
C1
L1
C2
L2 C4
RFC
C5
C3
MUN 1
IAM-91
C6
IF
+V
Figure 32. Complete 1.9 GHz Mixer.
The following performance was measured for a 1.9 GHz
circuit:
Measured results:
Conversion Gain = 9.0 dB
LO-RF Isolation = 17 dB
SSB Noise Figure = 8.5 dB
LO-IF Isolation = 34 dB
P1dB (output) = -8.1 dB
IP3 (Input) = -7 dBm
Operating conditions:
RF-IF Isolation = 23 dB
RF Frequency = 1.89 GHz
LO Drive Level = -5 dBm
LO Frequency = 1.78 GHz
DC Power = 3.0V @ 9 mA
IF Frequency = 110 MHz
11

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