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PDF SLW18N50C Data sheet ( Hoja de datos )
| Número de pieza | SLW18N50C | |
| Descripción | N-Channel MOSFET | |
| Fabricantes | Maple Semiconductor | |
| Logotipo |  |
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SLW18N50C
500V N-Channel MOSFET
General Description
This Power MOSFET is produced using Maple semi‘s
advanced planar stripe DMOS technology.
This advanced technology has been especially tailored
to minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction based on half bridge topology.
Features
- 18A, 500V, RDS(on) = 0.32Ω@VGS = 10 V
- Low gate charge ( typical 50nC)
- High ruggedness
- Fast switching
- 100% avalanche tested
- Improved dv/dt capability
D
GDS
TO-3P
G
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25℃)
- Continuous (TC = 100℃)
- Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25℃)
- Derate above 25℃
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
S
SLW18N50C
500
18
10.8
72
±30
990
18
23.5
4.5
235
1.88
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/℃
℃
℃
Thermal Characteristics
Symbol
RθJC
RθJS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
Typ
--
0.24
--
Maple Semiconductor CO., LTD
http://www.maplesemi.com
Max
0.52
--
40
Units
℃/W
℃/W
℃/W
Rev. 00 April. 2013
1 page  
Gate Charge Test Circuit & Waveform
Current Regulator
50KΩ
Same Type
as DUT
VGS
12V 200nF
300nF
10V
VGS
VDS
Qgs
3mA
DUT
R1 R2
Current Sampling (IG) Current Sampling (ID)
Resistor
Resistor
Qg
Qgd
Charge
Resistive Switching Test Circuit & Waveforms
10V
Vout
Vin
RG
RL
VDD
( 0.5 rated VDS )
DUT
Vout 90%
Vin 10%
td(on) tr
t on
td(off) tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
Vary tp to obtain
required peak ID
VDS
LL
ID
BVDSS
IAS
EAS =
--1--
2
LL IAS2
BVDSS
--------------------
BVDSS -- VDD
RG
10V
tp
DUT
C
VDD
VDD
ID (t)
tp
VDS (t)
Time
Maple Semiconductor CO., LTD
http://www.maplesemi.com
Rev. 00 April. 2013
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet SLW18N50C.PDF ] | |
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