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PDF MK20DN64VLH5 Data sheet ( Hoja de datos )
| Número de pieza | MK20DN64VLH5 | |
| Descripción | ARM CORTEX MCU | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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K20 Sub-Family Reference Manual
Supports: MK20DN32VLH5, MK20DX32VLH5, MK20DN64VLH5,
MK20DX64VLH5, MK20DN128VLH5, MK20DX128VLH5,
MK20DN32VMP5, MK20DX32VMP5, MK20DN64VMP5,
MK20DX64VMP5, MK20DN128VMP5, MK20DX128VMP5
Document Number: K20P64M50SF0RM
Rev. 2, Feb 2012
1 page  
Section Number
Title
Page
3.5.3 SRAM Configuration...................................................................................................................................88
3.5.4 System Register File Configuration.............................................................................................................91
3.5.5 VBAT Register File Configuration..............................................................................................................91
3.5.6 EzPort Configuration...................................................................................................................................92
3.6 Security.........................................................................................................................................................................93
3.6.1 CRC Configuration......................................................................................................................................93
3.7 Analog...........................................................................................................................................................................94
3.7.1 16-bit SAR ADC Configuration..................................................................................................................94
3.7.2 CMP Configuration......................................................................................................................................98
3.7.3 VREF Configuration....................................................................................................................................100
3.8 Timers...........................................................................................................................................................................101
3.8.1 PDB Configuration......................................................................................................................................101
3.8.2 FlexTimer Configuration.............................................................................................................................104
3.8.3 PIT Configuration........................................................................................................................................107
3.8.4 Low-power timer configuration...................................................................................................................108
3.8.5 CMT Configuration......................................................................................................................................110
3.8.6 RTC configuration.......................................................................................................................................111
3.9 Communication interfaces............................................................................................................................................112
3.9.1 Universal Serial Bus (USB) FS Subsystem.................................................................................................112
3.9.2 SPI configuration.........................................................................................................................................117
3.9.3 I2C Configuration........................................................................................................................................120
3.9.4 UART Configuration...................................................................................................................................121
3.9.5 I2S configuration..........................................................................................................................................123
3.10 Human-machine interfaces (HMI)................................................................................................................................127
3.10.1 GPIO configuration......................................................................................................................................127
3.10.2 TSI Configuration........................................................................................................................................128
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................131
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc.
5
5 Page 
Section Number
Title
Page
13.2 Reset memory map and register descriptions...............................................................................................................253
13.2.1 System Reset Status Register 0 (RCM_SRS0)............................................................................................253
13.2.2 System Reset Status Register 1 (RCM_SRS1)............................................................................................255
13.2.3 Reset Pin Filter Control Register (RCM_RPFC).........................................................................................257
13.2.4 Reset Pin Filter Width Register (RCM_RPFW)..........................................................................................258
13.2.5 Mode Register (RCM_MR).........................................................................................................................259
Chapter 14
System Mode Controller
14.1 Introduction...................................................................................................................................................................261
14.2 Modes of operation.......................................................................................................................................................261
14.3 Memory map and register descriptions.........................................................................................................................263
14.3.1 Power Mode Protection Register (SMC_PMPROT)...................................................................................264
14.3.2 Power Mode Control Register (SMC_PMCTRL).......................................................................................265
14.3.3 VLLS Control Register (SMC_VLLSCTRL)..............................................................................................267
14.3.4 Power Mode Status Register (SMC_PMSTAT)..........................................................................................268
14.4 Functional Description..................................................................................................................................................268
14.4.1 Power mode transitions................................................................................................................................268
14.4.2 Power mode entry/exit sequencing..............................................................................................................271
14.4.3 Run modes....................................................................................................................................................274
14.4.4 Wait modes..................................................................................................................................................275
14.4.5 Stop modes...................................................................................................................................................276
14.4.6 Debug in low power modes.........................................................................................................................279
Chapter 15
Power Management Controller
15.1 Introduction...................................................................................................................................................................281
15.2 Features.........................................................................................................................................................................281
15.3 Low-voltage detect (LVD) system................................................................................................................................281
15.3.1 LVD reset operation.....................................................................................................................................282
15.3.2 LVD interrupt operation...............................................................................................................................282
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MK20DN64VLH5.PDF ] | |
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