|
|
PDF PG240128WRM-ATA-IY6 Data sheet ( Hoja de datos )
| Número de pieza | PG240128WRM-ATA-IY6 | |
| Descripción | LCD Module | |
| Fabricantes | POWERTIP | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PG240128WRM-ATA-IY6 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
POWERTIP TECH. CORP.
Specification For Approval
Customer
Model Type
Sample Code
Mass Production Code
Edition
LCD MODULE
PG240128WRM-ATA-IY6
0
Customer Sign Sales Sign
Checked By Approved By Prepared By
(QA)
NO.PT-A-005-2
1 page  
1.4 DC Electrical Characteristics
PG240128WRM-ATA-IY6 Revision : 0 (DK)
VDD = 5.0 V ± 10% VSS = 0V Ta = 25°C
Item
Symbol
Condition
Min. Typ. Max. Unit
Logic Supply Voltage
VDD
4.5 5.0 5.5 V
“H” Input Voltage
VIH
VDD-2.2 -
VDD V
“L” Input Voltage
VIL
0 - 0.8 V
“H” Output Voltage
VOH
VDD-0.3 -
VDD V
“L” Output Voltage
VOL
0 - 0.3 V
Operating Frequency
fosc
- 6 - MHz
Supply Current
IDD VDD = 5.0 V fOSC=3.0MHz - 55 - mA
VDD - VO (-20°C) - - -
LCD Driver Voltage
VOP
VDD - VO (25°C)
- 17.5 - V
VDD - VO (70°C) - - -
1.5 Optical Characteristics
1/128Duty 1/12Bias VOP =17.5 V Ta = 25°C
Item
Symbol Conditions
Min. Typ. Max. Reference
View Angle
θ C>2.0,∅= 0° 40°
-
- Notes 1 & 2
Contrast Ratio
C θ=5°, ∅= 0° - 3 - Note 3
Response Time(rise)
Tr θ= 5°, ∅= 0°
-
200 ms 300 ms
Note 4
Response Time(fall)
Tf θ= 5°, ∅= 0° - 250 ms 380 ms Note 4
POWERTIP TECHNOLOGY CORPORATION
DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN
Page 5
5
5 Page 
PG240128WRM-ATA-IY6 Revision : 0 (DK)
2.4 Display command
1.Register Set
Code
00100001
00100010
00100100
Hex. Function
21H Cursor pointer set
22H Offset register set
24H Address pointer set
D1
X ADRS
Data
Low ADRS
D2
Y ADRS
00H
High ADRS
(1) Cursor pointer set
The position of cursor is specified by X ADRS, Y ADRS. The cursor position is moved only by
this command. The cursor pointer doesn’t have the function of increment and decrement. The shift
of cursor are set by this command. X ADRS, Y ADRS are specified following.
X ADRS
00H~4FH (Lower 7bits are valid)
Y ADRS
00H~1FH (Lower 5 bits are valid)
1. 1 screen drive
2. 2 screens drive
X ADRS 00~4FH
X ADRS 00~4FH
Y ADRS 00H~0FH
Y ADRS 00H~0FH
Upper screen
Y ADRS 10H~1FH
Lower screen
(2) Offset register set
The offset register is used to determine external character generator RAM area.
T693C has 16 bit address lines as follow.
MSB
LSB
ad15 ad14 ad13 ad12 ad11 ad10 ad9 ad8 ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0
The upper 5 bit (ad15~ad11) are determined by offset register. The middle 8 bit (ad10~ad3) are
determined by character code. The lower 3 bit (ad2~ad0) are determined by vertical counter. The
lower 5 bit of D1 (data) are valid.
The data format of external character generator RAM.
POWERTIP TECHNOLOGY CORPORATION
DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN
Page 11
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PG240128WRM-ATA-IY6.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PG240128WRM-ATA-IY6 | LCD Module | POWERTIP |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |