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LG128643-SFDWH6V 데이터시트 PDF




ETC에서 제조한 전자 부품 LG128643-SFDWH6V은 전자 산업 및 응용 분야에서
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LG128643-SFDWH6V 데이터시트, 핀배열, 회로
LCD Module Specification
Model No.: LG128643-SMDWH6V
LG128643-SFDWH6V
LG128643-BMDWH6V
LG128643-LMDWH6V
LG128643-FMDWH6V
LG128643-FFDWH6V
LG128643-QFDWH6V
Table of Contents
1. BASIC SPECIFICATIONS ····························································· 2
2. ABSOLUTE MAXIMUM RATINGS ················································ 3
3. ELECTRICAL CHARACTERISTICS ············································· 4
4. OPERATING PRINCIPLES & METHODS ···································· 7
5. DISPLAY CONTROL INSTRUCTIONS ······································ 10
6. DISPLAY DATA RAM ADDRESS MAP ······································ 13
7. CONNECTION WITH 8051 FAMILY MPU ·································· 14
8. ELECTRO-OPTICAL CHARACTERISTICS ································ 15
9. DIMENSIONAL OUTLINE ···························································· 16
10. LCD MODULE NUMBERING SYSTEM ······································ 17
11. PRECAUTIONS FOR USE OF LCD MODULE ··························· 18
RECORD OF REVISION
Rev.
Date
Page
0.1 2007/11/01
--
0.2 2010/03/25
2
0.3 2010/10/18
2
Item
Description
-- New release
1.1 Add QFDWH6V mode
1.1 Add SMDWH6V mode




LG128643-SFDWH6V pdf, 반도체, 판매, 대치품
LG128643-xxDWH6V Rev 0.3
-4-
3. ELECTRICAL CHARACTERISTICS
3.1 DC Characteristics
Item Symbol Condition
Supply Voltage
(Logic)
Supply Voltage
(LCD Drive)
VDD
VDD-VO
Input High Voltage
VIH
Input Low Voltage
VIL
Output High Voltage VOH IOH=-0.2mA
Output Low Voltage
Supply Current
(Logic)
VOL IOL=1.6mA
IDD VDD=5.0V
Min.
4.5
--
2.0
0
2.4
0
--
(VDD=5.0V±10%, Ta=25°C)
Typ.
Max. Unit
5.0 5.5 V
11.7
--
--
--
--
6.0
--
VDD
0.8
VDD
0.4
8.0
V
V
V
V
V
mA
3.2 Interface Timing Chart
Characteristic
E Cycle
E High Level Width
E Low Level Width
E Rise Time
E Fall Time
Address Set-Up Time
Address Hold Time
Data Set-Up Time
Data Delay Time
Data Hold Time(Write)
Data Hold Time(Read)
Symbol
tC
tWH
tWL
tR
tF
tASU
tAH
tDSU
tD
tDHW
tDHR
Min.
1000
450
450
--
--
140
10
200
--
10
10
(VDD=5.0V±10%, Ta=25°C)
Typ.
Max.
Unit
-- -- ns
-- -- ns
-- -- ns
-- 25 ns
-- 25 ns
-- -- ns
-- -- ns
-- -- ns
-- 320 ns
-- -- ns
-- -- ns

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LG128643-SFDWH6V 전자부품, 판매, 대치품
LG128643-xxDWH6V Rev 0.3
-7-
4. OPERATING PRINCIPLES & METHODS
4.1 I/O Buffer
Input buffer controls the status between the enable and display of chip. Unless the IC
(selected by CS1 or CS2) is in active mode, input or output of data and instruction does not
execute. Therefore internal state is maintained. But /RST can operate regardless the level
of CS1 or CS2.
4.2 Register
Both input register and output register are provided to interface to MPU of which the speed
is different from that of internal operation. The selections of these registers depend on the
combination of R/W and RS signals.
RS R/W
Function
L Instruction
L
H Status read (busy check)
L Data write (from input register to display data RAM)
H
H Data read (from display data RAM to output register)
4.2.1 Input Register
Input register stores the data temporarily before writing it into display data RAM.
When the IC is in active mode, R/W and RS select the input register. The data from MPU
is written into input register, then into display data RAM. Data is latched at falling edge of
the E signal and then written into the display data RAM automatically by internal operation.
4.2.2 Output Register
Output register stores the data temporarily which is read from display data RAM when the
IC is in active mode and R/W and RS=H, stored data in display data RAM is latched in
output register. When the IC is in active mode and R/W=H, RS=L, status data (busy check)
can be read out.
To read the contents of display data RAM, twice access of read instruction is needed. In
first access, data in display data RAM is latched into output register. In second access,
MPU can read data that is latched in output register. That is, to read the data in display
data RAM, it needs dummy read. But status read does not need dummy read.
The following shows the MPU read timing.

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