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PDF MDC5001T1 Data sheet ( Hoja de datos )
| Número de pieza | MDC5001T1 | |
| Descripción | Low Voltage Bias Stabilizer | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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ON Semiconductort
Low Voltage Bias Stabilizer
with Enable
• Maintains Stable Bias Current in N−Type Discrete Bipolar Junction
and Field Effect Transistors
• Provides Stable Bias Using a Single Component Without Use of
Emitter Ballast and Bypass Components
• Operates Over a Wide Range of Supply Voltages Down to 1.8 Vdc
• Reduces Bias Current Variation Due to Temperature and
Unit−to−Unit Parametric Changes
• Consumes t 0.5 mW at VCC = 2.75 V
• Active High Enable is CMOS Compatible
This device provides a reference voltage and acts as a DC feedback
element around an external discrete, NPN BJT or N−Channel FET. It
allows the external transistor to have its emitter/source directly
grounded and still operate with a stable collector/drain DC current. It
is primarily intended to stabilize the bias of discrete RF stages
operating from a low voltage regulated supply, but can also be used to
stabilize the bias current of any linear stage in order to eliminate
emitter/source bypassing and achieve tighter bias regulation over
temperature and unit variations. The “ENABLE” polarity nulls
internal current, Enable current, and RF transistor current in
“STANDBY.” This device is intended to replace a circuit of three to
six discrete components.
The combination of low supply voltage, low quiescent current drain,
and small package make the MDC5001T1 ideal for portable
communications applications such as:
• Cellular Telephones
• Pagers
• PCN/PCS Portables
• GPS Receivers
• PCMCIA RF Modems
• Cordless Phones
• Broadband and Multiband Transceivers and Other Portable Wireless
Products
MDC5001T1
SILICON
SMALLBLOCK™
INTEGRATED CIRCUIT
65
4
123
CASE 419B−01, Style 19
SOT−363
INTERNAL CIRCUIT DIAGRAM
VCC (4)
R1
Q1
R2
VENBL
(5)
R3
R5 R4
Q4
Vref (6)
Q2 Iout (1)
R6
GND (2) and (3)
© Semiconductor Components Industries, LLC, 2005
February, 2005 − Rev. XXX
1
Publication Order Number:
MDC5001T1/D
1 page  
MDC5001T1
TYPICAL OPEN LOOP CHARACTERISTICS
(Refer to Circuits of Figures 10 through 15)
50
40 VCC = 2.75 Vdc
30 VENBL = VCC
Iout = 500 mA
Iout = 100 mA
20 Iout = 30 mA
10
0 Iout = 10 mA
−10
−20
−30
−40
−50
−45 −35 −25 −15 −5 5 15 25 35 45 55 65 75 85
TJ, JUNCTION TEMPERATURE (°C)
Figure 2. DVref versus TJ @ Iout
900
800
700
600
500
400
300
200
100
0
0
VENBL = VCC
TJ = −40°C
TJ = 25°C
TJ = 85°C
1 2 3 4 5 6 7 8 9 10
VCC, SUPPLY VOLTAGE (Vdc)
Figure 3. ICC versus VCC @ TJ
1000
TJ = −40°C
500 TJ = 25°C
300 TJ = 85°C
200
100
50
30
20 VCE2 = Vout − Vref = −1.5 Vdc
10
10 20 30 50 100 200 300 500
Iout, DC OUTPUT CURRENT (mAdc)
Figure 4. Q2 Current Gain versus
Output Current @ TJ
6.0
VCC = 5.0 Vdc
5.0
1000
160
140
VCC = 2.75 Vdc
Iref = 30 mA
120
TJ = −40°C
TJ = 25°C
100
TJ = 85°C
80
60
40
20
0
0 0.5 1.0 1.5 2.0 2.5 3.0
VENABLE (Vdc)
Figure 5. Ienable versus Venable
Iout = 500 mA
Iout = 30 mA
4.0
3.3 Vdc
3.0 2.75 Vdc
2.0 1.8 Vdc
TJ = 25°C
1.0
0
0
0.5 1.0
MIN VENBL FOR STABLE Vref @ VCC
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Venable (Vdc)
Figure 6. Vref versus Venable @ VCC and Iout
http://onsemi.com
5
5 Page 
MDC5001T1
PACKAGE DIMENSIONS
A
G
V
SC−88 (SOT−363)
CASE 419B−01
ISSUE G
654
S −B−
123
D 6 PL
C
0.2 (0.008) M B M
N
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.071 0.087
B 0.045 0.053
C 0.031 0.043
D 0.004 0.012
G 0.026 BSC
H −−− 0.004
J 0.004 0.010
K 0.004 0.012
N 0.008 REF
S 0.079 0.087
V 0.012 0.016
MILLIMETERS
MIN MAX
1.80 2.20
1.15 1.35
0.80 1.10
0.10 0.30
0.65 BSC
−−− 0.10
0.10 0.25
0.10 0.30
0.20 REF
2.00 2.20
0.30 0.40
HK
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
http://onsemi.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MDC5001T1.PDF ] | |
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