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PDF SG8UP5393 Data sheet ( Hoja de datos )
| Número de pieza | SG8UP5393 | |
| Descripción | 8-Bit OTP Microcontroller | |
| Fabricantes | SiGma Micro | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SG8UP5393 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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SPECIFICATION
SG8UP5393
8-Bit OTP Microcontroller
Version 1.3
Sigma reserves the right to change this documentation without prior notice
1 page  
SG8UP5393
8-Bit OTP Microcontroller
· a watch dog timer with its own on-chip RC oscillator to prevent system stand still
· Power-down mode (SLEEP mode)
· Three clocks per instruction cycle
· Built-in power on reset (POR)
· Power-up timer (PWRT)
· Oscillator Startup timer (OST)
· I/O Ports
· Up to 13 LED sink pins (P20~P22、P26~P27、P4)
· Each GPIO pin of P0, P1, P3,P4, has an internal programmable pull-high resistor
· Each GPIO pin of P1, P24~P27,and P4 can wakeup the MCU from sleep mode by input state
change
· Internal Memory
· Built-in 4K*14bits OTP ROM.
· Built-in 144 bytes general purpose registers(SRAM)
· Built-in USB Application FIFOs
· Operation Frequency
· MCU can run at the internal RC oscillator frequency, 6MHz
· Built-in 3.3V Voltage Regulator.
· For USB PHY power supply
· Pull-up source for the external USB resistor on DM pin
3. APPLICATIONS
· USB and PS/2 both compatible with Keyboard.
Sigma reserves the right to change this documentation without prior notice Page 5 of 40
5 Page 
EFT_STA EFT flag
0 – EFT not occured
1 – EFT occured
EFT_MD EFT mode
0 – normal mode
1 – EFT mode
Access mode: read only
TO PD
1 1 Power-on reset
1 1 WDTC instruction
0 P WDT time-out
1 0 Power down mode
P: Previous status before WDT reset
Initial value on reset:1001 1uuu (Bin).
SG8UP5393
8-Bit OTP Microcontroller
Condition
RP(RAM Pointer)
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2
B1 B0 A5 A4 A3 A2
A5~A0 are used to select the registers in the indirect addressing mode.
Bit1
A1
Bit0
A0
The address 0x00~0x1F is common space. In 0x20h~0x3F are divided into four banks. Use
Bank Select Register.
B1, B0 to select the bank for the RAM address from 0x20~0x3F.
The following are two examples:
(1) RP=00001100 and RP=01001100 point to the same register 0xCh. Since 0x0Ch is in the
common space. Bit6 and Bit7 are meaningless.
(2) RP=100111100 point to the register 0x3C in Back2
B1 B0
00
01
10
11
RAM Bank
Bank0
Bank1
Bank2
Bank3
Sigma reserves the right to change this documentation without prior notice Page 11 of 40
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SG8UP5393.PDF ] | |
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