|
|
PDF W78C54 Data sheet ( Hoja de datos )
| Número de pieza | W78C54 | |
| Descripción | 8-BIT MICROCONTROLLER | |
| Fabricantes | Winbond | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de W78C54 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
|
No Preview Available !
W78C54
8-BIT MICROCONTROLLER
GENERAL DESCRIPTION
The W78C54 is a derivative of the W78C52 microcontroller family that provides extended internal
ROM. The chip has 16K bytes of mask ROM and 256 bytes of RAM.
This device provides an enhanced architecture that makes it more powerful and suitable for a variety
of applications for general control systems. It provides on-chip 16KB mask ROM to accommodate
large program codes, 256-bytes of non-volatile on-chip RAM, four 8-bit I/O ports, one 4-bit I/O port,
three 16-bit timer/counters, eight sources with two-level interrupt structures, and on-chip oscillator
clock circuits.
FEATURES
• DC to 40 MHz extensive operating frequency
• 256-byte on-chip scratch pad RAM
• 16K-byte on-chip mask ROM
• 64K-byte address space for external Program Memory
• 64K-byte address space for external Data Memory
• Three 16-bit timer/counters
• Four 8-bit bit-addressable I/O ports
• One extra 4-bit bit-addressable I/O port, additional INT2/ INT3
(Available on 44-pin PLCC/QFP package)
• Eight-source, two priority-level interrupts
• Low EMI emission mode
• Built-in programmable power-saving modes - Idle mode & Power-down mode
• Packages:
− DIP 40: W78C54-16/24/40
− PLCC 44: W78C54P-16/24/40
− QFP 44: W78C54F-16/24/40
− TQFP 44: W78C54M-16/24/40
Publication Release Date: December 1997
- 1 - Revision A2
1 page  
W78C54
FUNCTIONAL DESCRIPTION
The W78C54 is pin-to-pin compatible with the W78C52, except that the internal 8K mask ROM has
been replaced with 16K of internal mask ROM. The processor supports 111 different opcodes and
references both 64K program address space and 64K data storage space.
Clock
The W78C54 is designed to be used with either a crystal oscillator or an external clock. Internally, the
clock is divided by two before it is used. This makes the W78C54 relatively insensitive to duty cycle
variations in the clock.
Crystal Oscillator
The W78C54 incorporates a built-in crystal oscillator. To make the oscillator work, a crystal is
connected across pins XTAL1 and XTAL2. In addition, a load capacitance of 30 pf (typically) must be
connected from each pin to ground. Resistor must also be connected from XTAL1 to XTAL2 to
provide a DC bias when the crystal frequency is above 24 MHz.
External Clock
An external clock should be connected to pin XTAL1. Pin XTAL2 should be left unconnected. The
XTAL1 input is a CMOS-type input, as required by the crystal oscillator. As a result, the external clock
signal should have an input one level greater than 3.5 volts.
Power Management
Idle Mode
The idle mode is entered by setting the IDLE bit in the PCON register. In the idle mode, the internal
clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The
processor will exit idle mode when either an interrupt or a reset occurs.
Power-down Mode
When the PD bit of the PCON register is set, the processor enters the power-down mode. In this
mode all of the clocks are stopped, including the oscillator. The only way to exit power-down mode is
by a reset.
Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running.
An internal trigger circuit in the reset line is used to deglitch the reset line when the W78C54 is used
with an external RC network. The reset logic also has a special glitch removal circuit that ignores
glitches on the reset line.
During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of
bit 4) to 00H, and all of the other SFR registers except SBUF to 00H. SBUF is not reset.
New Defined Peripheral
In order to be more suitable for I/O, an extra 4-bit bit-addressable port P4 and two external interrupt
INT2, INT3 has been added to either the PLCC or QFP 44 pin package. And description follows:
Publication Release Date: December 1997
- 5 - Revision A2
5 Page 
W78C54
TR1: Timer 1 run control bit. Set/cleared by software to turn timer/counter on or off.
TF0: Timer 0 overflow flag. Set by hardware on timer/counter overflow. Cleared by hardware when
processor vectors to interrupt routine.
TR0: Timer 0 run control bit. Set/cleared by software to turn timer/counter on or off.
IE1: Interrupt 1 edge flag. Set by hardware when external interrupt edge detected. Cleared when
interrupt processed.
IT1: Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupt.
IE0: Interrupt 0 edge flag. Set by hardware when external interrupt edge detected. Cleared when
interrupt processed.
IT0: Interrupt 0 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupt.
***T2CON - Timer 2 Control (C8H)
TF2 EXF2 RCLK TCLK
EXEN2
TR2
C//T CP//RL2
TF2:
Timer 2 overflow flag. Set by a Timer 2 overflow and must be cleared by software. TF2 will
not be set when RCLK = 1 or TCLK = 1.
EXF2:
Timer2 external flag. Set when either a capture or reload is caused by a negative transition
on T2EX and EXEN2 = 1. When Timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU
to vector to the Timer 2 interrupt routine. EXF2 must be cleared by software.
RCLK: Receive clock flag. RCLK = 1 causes the serial port to use Timer 2 overflow pulses for its
receive clock in mode 1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the
receive
clock.
TCLK: Transmit clock flag. TCLK = 1 causes the serial port to use Timer 2 overflow pulses for its
transmit clock in mode 1 and 3. TCLK = 0 causes Timer 1 overflow to be used for the
transmit clock.
EXEN2: Timer 2 external enable flag. EXEN2 = 1 allows a capture or reload to occur as a result of a
negative transition on T2EX if Timer 2 is not used to clock the serial port. EXEN2 = 0
causes
Timer 2 to ignore events at T2EX.
TR2: TR2 = 1/0: turns on/off Timer 2.
C//T: Timer or Counter select. Set 1/0 for external event counter(falling edge triggered)/inter
timer.
CP//RL2: Capture/reload flag.
*Reduced EMI Mode
The AO bit in the AUXR register, when set, disables the ALE output.
***AUXR - Auxiliary Register (8EH)
- - - - - - - AO
AO: Turn off ALE output.
- 11 -
Publication Release Date: December 1997
Revision A2
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet W78C54.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| W78C516 | 8-BIT MICROCONTROLLER | Winbond |
| W78C51D | 8-BIT MICROCONTROLLER | Winbond |
| W78C52D | 8-BIT MICROCONTROLLER | Winbond |
| W78C54 | 8-BIT MICROCONTROLLER | Winbond |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |