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W567S150 데이터시트 PDF




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부품번호 W567S150 기능
기능 8-Channel Speech + Melody Processor
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W567S150 데이터시트, 핀배열, 회로
www.DataSheet4U.com
W567SXXX Data Sheet
8-CHANNEL SPEECH+MELODY PROCESSOR
(BandDirectorTM Series)
Table of Contents-
1. GENERAL DESCRIPTION ......................................................................................................... 2
2. FEATURES ................................................................................................................................. 3
3. PIN DESCRIPTION..................................................................................................................... 4
4. BLOCK DIAGRAM ...................................................................................................................... 5
5. ELECTRICAL CHARACTERISTICS........................................................................................... 5
5.1 Absolute Maximum Ratings............................................................................................... 5
5.2 DC Characteristics............................................................................................................. 6
5.3 AC Characteristics ............................................................................................................. 7
6. TYPICAL APPLICATION CIRCUIT............................................................................................. 8
7. REVISION HISTORY .................................................................................................................. 9
Publication Release Date: October 15, 2003
- 1 - Revision A8




W567S150 pdf, 반도체, 판매, 대치품
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W567SXXX
3. PIN DESCRIPTION
PIN NAME I/O
FUNCTION
RESETB
In IC reset input, low active.
XIN In 32 KHz crystal oscillator with divider for time-keeping application
XOUT
Out 32 KHz crystal oscillator with divider for time-keeping application
OSC
In
Main-clock oscillation input. Only Ring type is used. Connect to GND via the
oscillation resistor.
IP0[3:0] /
IP0[7:4]
General input port with pull-high selection. Each 2 input pins can be
programmed to generate interrupt request and used to release IC from
In STOP mode.
IP0[3:0] are used as the input of ADC. IP0.0 is the input pin of channel 0
and IP0.3 is the input pin of channel 3, and so on.
BP0[7:0]
General input/output pins. When used as output pin, it can be open–drain
or CMOS type and it can sink 8mA for high-current applications. When
used as input pin, there may have a pull-high option and generate interrupt
I/O request to release IC from STOP mode.
When BP0[7] is used as output pin, it can be the IR transmission carrier for
IR applications.
BP1[7:0]
General input/output pins. When used as output pin, it can be open–drain
I/O
or CMOS type. When used as input pin, there may have a pull-high option
and generate interrupt request to release IC from STOP mode.
When serial interface is enabled, BP1[6:4] are used as serial interface pins.
BP2[7:0]
General input/output pins. When used as output pin, it can be open–drain
I/O or CMOS type. When used as input pin, there may have a pull-high option
and generate interrupt request to release IC from STOP mode.
*VRB
Reference-bottom voltage of ADC. Theoretically, the converted codes 0 ~
Out 255 will be uniformly distributed between VRB and AVDD. Voltages below
VRB will be mapped to code 0.
*CIN
In Capacitor input for ADC.
*COUT
Out Capacitor output for ADC.
*AVDD
DAC0
Out ADC regulator output voltage.
Out Current type DAC speaker output 0.
DAC1
Out Current type DAC speaker output 1.
TEST
In Test input, internally pulled low. Do not connect during normal operation.
VDD (VDD1) Power Positive power supply.
VSS (VSS1) Power Negative power supply.
*VDDA
Power Positive power supply for ADC module.
*VSSA
Power Negative power supply for ADC module.
*: Only W567S301~S341 provides these pins for ADC application.
-4-

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W567SXXX
5.3 AC Characteristics
(VDD-VSS = 4.5 V, FM = 8 MHz, Ta = 25°C; No Load unless otherwise specified)
PARAMETER
SYM.
TEST CONDITIONS
SPEC.
UNIT
Min. Typ. Max.
Main-Clock
Ring type, *Rosc = 330 K3.6 4 4.4
FM MHz
Ring type, *Rosc = 160 K7.2 8 8.8
Cycle Time
TCYC FSYS = 8 MHz
125 - DC nS
Main-Clock Wake-up
Stable Time
TWSM Ring type, R = 160 K
- 3 5 mS
Main-Clock Frequency
Deviation, Ring type
F
F
FMAX - FMIN
FMIN
- 3 7.5 %
RESETB Active Width
ADC Resolution
ADC Accuracy
ADC Capacitor
ADC Conversion Time
ADC Stable Time
TRES
Ebit
CADC
TCON
TADS
After FSYS stable
Fixed AVDD2
AVDD = 3.6 ~ 5.5V
Conversion rate = 8 KHz,
FSYS = 4 MHz
Conversion rate = 16 KHz,
FSYS = 8 MHz
AVDD = VDD = 3V
4
-
-
-
-
-
512/FM
-
-
-
-
-
2000
1000
-
-
-
6
5
±1
-
-
32K/FM
2
TCYC
bits
bits
LSB
pF
pF
µS
µS
*: Typical ROSC value for each part number should refer to design guide.
2 AVDD is a fixed voltage, for example AVDD = 3.6V, 4.5V, or 5.5V.
-7-
Publication Release Date: October 15, 2003
Revision A8

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W567S150

8-CHANNEL SPEECH+MELODY PROCESSOR

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W567S150

8-Channel Speech + Melody Processor

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