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PDF EM88F752N Data sheet ( Hoja de datos )
| Número de pieza | EM88F752N | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | ELAN Microelectronics | |
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EM88F752N
8-BIT
Microcontroller
Product
Specification
DOC. VERSION 1.3
ELAN MICROELECTRONICS CORP.
December 2016
1 page  
Contents
6.1.77 Bank 1 R17: PWMACR (PWMA Control Register)..........................................55
6.1.78 Bank 1 R18: PRDAL (Low Byte of PWMA Period) ..........................................56
6.1.79 Bank 1 R19: PRDAH (High Byte of PWMA Period) ........................................56
6.1.80 Bank 1 R1A: DTAL (Low Byte of PMWA Duty)................................................56
6.1.81 Bank 1 R1B: DTAH (High Byte of PMWA Duty) ..............................................57
6.1.82 Bank 1 R1C: TMRAL (Low Byte of TimerA) ....................................................57
6.1.83 Bank 1 R1D: TMRAH (High byte of Timer A) ..................................................57
6.1.84 Bank 1 R1E: PWMBCR (PWMB Control Register) .........................................57
6.1.85 Bank 1 R1F: PRDBL (Low Byte of PWMB Period) .........................................58
6.1.86 Bank 1 R20: PRDBH (High Byte of PWMB period).........................................58
6.1.87 Bank 1 R21: DTBL (Low Byte of PMWB Duty) ...............................................59
6.1.88 Bank 1 R22: DTBH (High Byte of PMWB Duty) ..............................................59
6.1.89 Bank1 R23: TMRBL (Low Byte of Timer B).....................................................59
6.1.90 Bank 1 R24: TMRBH (High Byte of Timer B) ..................................................59
6.1.91 Bank 1 R25 ~ R39: (Reserved) .......................................................................59
6.1.92 Bank 1 R40: WCR (Watch Timer Control Register) ........................................60
6.1.93 Bank1 R41~R43: (Reserved) ..........................................................................60
6.1.94 Bank 1 R44: FLKR (Flash Key Register for Table Write Use).........................60
6.1.95 Bank 1 R45: TBPTL (Table Point Low Register) .............................................60
6.1.96 Bank 1 R46: TBPTH (Table Point High Register)............................................61
6.1.97 Bank 1 R47: STKMON (Stack Point)...............................................................61
6.1.98 Bank 1 R48: PCH (Program Counter High) ....................................................61
6.1.99 Bank 1 R49: LVDCR (Low Voltage Detector Control Register).......................62
6.1.100 Bank 1 R4D TBWCR (Table Write Control Register) ......................................62
6.1.101 Bank 1 R4E: 0cL (Table Write Start Address Low Byte)..................................63
6.1.102 Bank 1 R4F: TBWAH (Table Write Start Address High Byte) ..........................63
6.1.103 Bank 2 R5 TPEPCR1 (Touch Key Group A Enable Pin Control Register 1) ...63
6.1.104 Bank 2 R6 TPEPCR2 (Touch Key Group A Enable Pin Control Register 2) ...64
6.1.105 Bank 2 R7 ~ R8 (Reserved) ............................................................................65
6.1.106 Bank 2 R9 TPCCR (Touch Key Charge Discharge Current Control Register)65
6.1.107 Bank 2 RA TPCR1 (Touch Key Control Register 1) ........................................66
6.1.108 Bank 2 RB TPCR2 (Touch Key Control Register 2) ........................................67
6.1.109 Bank 2 RC TPCR3 (Touch Key Control Register 3) ........................................68
6.1.110 Bank 2 RD TPAHTH (Most Significant Byte of Group A High Wake-up
Threshold) .......................................................................................................69
6.1.111 Bank 2 RE TPAHTL (Least Significant Byte of Group A High Wake-up
Threshold) .......................................................................................................69
6.1.112 Bank 2 RF TPALTH (Most Significant Byte of Group A Lower Wakeup
Threshold) .......................................................................................................69
6.1.113 Bank 2 R10 TPALTL (Least Significant Byte of Group A Lower Wakeup
Threshold) .......................................................................................................69
6.1.114 Bank 2 R15 TPAH (Most Significant Byte of A Group Touch Key Buffer)........70
6.1.115 Bank 2 R16 TPAL (Least Significant Byte of A Group Touch Key Buffer) .......70
6.1.116 Bank 2 R19 TPSTH (Most Significant Byte of Sense Time) ...........................70
6.1.117 Bank 2 R1A TPSTL (Least Significant Byte of Sense Time) ...........................70
6.1.118 Bank 2 R1B~R46: (Reserved).........................................................................70
6.1.119 Bank 2 R47 LOCKPR (Lock Page Number Register) .....................................71
Product Specification (V1.3) 12.16.2016
v
5 Page 
EM88F752N
8-Bit Microcontroller
1 General Description
The EM88F752N is an 8-bit microprocessor designed and developed with low-power, high-speed CMOS
technology. It has an on-chip 2K*16-bit electrical flash memory.
Debug function is built in EM88F752N chip. User can read the program code from JTAG port and monitor
the on chip register status, memory and program trace log on computer.
The EM88F752N includes a capacitive touch-sensitive function. The self-contained capacitive touch key is
covered with a plastic or glass case. The system controller converts finger data to button presses,
depending on finger location and human interface context.
Using OCDS, user can develop their program for several flash types IC of ELAN
Product Specification (V1.3) 12.16.2016
(This specification is subject to change without prior notice)
1
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM88F752N.PDF ] | |
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