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PDF BUK456-60H Data sheet ( Hoja de datos )

Número de pieza BUK456-60H
Descripción PowerMOS transistor
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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Philips Semiconductors
PowerMOS transistor
Product Specification
BUK456-60H
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope.
The device is intended for use in
Automotive and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
MAX.
60
60
150
175
20
UNIT
V
A
W
˚C
m
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
PIN CONFIGURATION
tab
1 23
SYMBOL
d
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg
Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction Temperature
-
RGS = 20 k
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
-
-
-
-
-
-
-
-
- 55
-
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
-
MAX.
60
60
30
60
46
240
150
175
175
UNIT
V
V
V
A
A
A
W
˚C
˚C
MIN.
-
-
TYP. MAX. UNIT
- 1.0 K/W
60 - K/W
May 1993 1 Rev 1.100

1 page




BUK456-60H pdf
Philips Semiconductors
PowerMOS transistor
Product Specification
BUK456-60H
VGS / V
15
10
5
BUK456-60H
VDS / V =12
48
0
0 20 40 60 80
QG / nC
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 50 A; parameter VDS
100 IS / A
BUK456-60H
80
Tj / C = 25
150
60
40
20
0
0 0.5 1 1.5
VSDS / V
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
WDSS%
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140 160 180
Tmb / C
Fig.15. Normalised avalanche energy rating.
WDSS% = f(Tmb); conditions: ID = 50 A
VGS
0
RGS
L
VDS
T.U.T.
+ VDD
-
-ID/100
R 01
shunt
Fig.16. Avalanche energy test circuit.
WDSS = 0.5 LID2 BVDSS/(BVDSS VDD)
May 1993 5 Rev 1.100

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