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Número de pieza | BUK554-60H | |
Descripción | PowerMOS transistor Logic level FET | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de BUK554-60H (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! Philips Semiconductors
PowerMOS transistor
Logic level FET
Product specification
BUK554-60H
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope
The device is intended for use in
automotive and general purpose
switching applications.
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
VGS = 5 V
MAX.
60
39
125
175
42
PIN CONFIGURATION
SYMBOL
d
tab
1 23
g
s
UNIT
V
A
W
˚C
mΩ
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
±VGSM
ID
ID
IDM
Ptot
Tstg
Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Non-repetitive gate-source
voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction temperature
-
RGS = 20 kΩ
-
tp ≤ 50 µs
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
-
MIN.
-
-
-
-
-
-
-
-
- 55
-
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
MAX.
60
60
15
20
39
28
156
125
175
175
UNIT
V
V
V
V
A
A
A
W
˚C
˚C
TYP. MAX. UNIT
- 1.2 K/W
60 - K/W
August 1996
1
Rev 1.000
1 page Philips Semiconductors
PowerMOS transistor
Logic level FET
Product specification
BUK554-60H
VGS / V
12
BUK564-60H
10
VDS / = 12
8
48
6
4
2
0
0 10 20 30 40
QG / nC
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 39 A; parameter VDS
IF / A
100
BUK564-60H
80
60
Tj / C = 150
-40
40
25
20
0
012
VSDS / V
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
WDSS%
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140 160 180
Tmb / C
Fig.15. Normalised avalanche energy rating.
WDSS% = f(Tmb); conditions: ID = 39 A
VGS
0
RGS
L
VDS
T.U.T.
+ VDD
-
-ID/100
R 01
shunt
Fig.16. Avalanche energy test circuit.
WDSS = 0.5 ⋅ LID2 ⋅ BVDSS/(BVDSS − VDD)
August 1996
5
Rev 1.000
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet BUK554-60H.PDF ] |
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