|
|
Número de pieza | BUK556-60H | |
Descripción | PowerMOS transistor Logic level FET | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de BUK556-60H (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! Philips Semiconductors
PowerMOS transistor
Logic level FET
Product Specification
BUK556-60H
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope.
The device is intended for use in
automotive and general purpose
switching applications.
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
VGS = 5 V
PIN CONFIGURATION
SYMBOL
tab
1 23
g
MAX. UNIT
60 V
60 A
150 W
175 ˚C
22 mΩ
d
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg
Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak
value)
Total power dissipation
Storage temperature
Junction Temperature
-
RGS = 20 kΩ
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
-
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
Rth j-mb
Rth j-a
From junction to mounting base
From junction to ambient
MIN.
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
15
60
44
240
150
175
175
UNIT
V
V
V
A
A
A
W
˚C
˚C
MIN.
-
-
TYP. MAX. UNIT
- 1.0 K/W
60 - K/W
October 1993
1
Rev 1.000
1 page Philips Semiconductors
PowerMOS transistor
Logic level FET
VGS / V
10
BUK5y6-60A
9
8 VDS / V =12 48
7
6
5
4
3
2
1
0
0 20 40 60 80
QG / nC
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 50 A; parameter VDS
IF / A
200
150
BUK5y6-60A
Tj / C = 25
150
100
50
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
VSDS / V
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
Product Specification
BUK556-60H
WDSS%
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140 160 180
Tmb / C
Fig.15. Normalised avalanche energy rating.
WDSS% = f(Tmb); conditions: ID = 50 A
VGS
0
RGS
L
VDS
T.U.T.
+ VDD
-
-ID/100
R 01
shunt
Fig.16. Avalanche energy test circuit.
WDSS = 0.5 ⋅ LID2 ⋅ BVDSS/(BVDSS − VDD)
October 1993
5
Rev 1.000
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet BUK556-60H.PDF ] |
Número de pieza | Descripción | Fabricantes |
BUK556-60 | PowerMOS transistor Logic level FET | NXP Semiconductors |
BUK556-60 | PowerMOS transistor Logic level FET | NXP Semiconductors |
BUK556-60A | PowerMOS transistor Logic level FET | NXP Semiconductors |
BUK556-60H | PowerMOS transistor Logic level FET | NXP Semiconductors |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |