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BUK7640-100A PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 BUK7640-100A
기능 TrenchMOS transistor Standard level FET
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BUK7640-100A 데이터시트, 핀배열, 회로
Philips Semiconductors
TrenchMOStransistor
Standard level FET
Product specification
BUK7640-100A
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope
suitable for surface mounting. Using
trench’ technology the device
features very low on-state
resistance. It is intended for use in
automotive and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 10 V
MAX.
100
37
138
175
40
PINNING - SOT404
PIN DESCRIPTION
1 gate
2 drain
(no connection possible)
3 source
mb drain
PIN CONFIGURATION
mb
2
13
SYMBOL
d
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
RGS = 20 k
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
Minimum footprint, FR4
board
MIN.
-
-
-
-
-
-
-
- 55
MAX.
100
100
20
37
26
149
138
175
TYP.
-
50
MAX.
1.1
-
UNIT
V
A
W
˚C
m
UNIT
V
V
V
A
A
A
W
˚C
UNIT
K/W
K/W
December 1999
1
Rev 1.000




BUK7640-100A pdf, 반도체, 판매, 대치품
Philips Semiconductors
TrenchMOStransistor
Standard level FET
Product specification
BUK7640-100A
50 Drain Current, ID (A)
Tj = 25 C
45
VGS = 10V
8V
40 6 V
35
30
25 5.4 V
20
15
10
5
0
0
5.2 V
5V
4.8 V
4.6 V
4.4 V
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID = f(VDS)
Drain-Source On Resistance, RDS(on) (Ohms)
0.1
5 V 5.2 V 5.4 V
0.09 4.8 V
0.08
Tj = 25 C
0.07
0.06
0.05
0.04
6V
8V
0.03
0.02
VGS = 10V
0.01
0
0 5 10 15 20 25 30 35 40 45 50
Drain Current, ID (A)
Fig.6. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID)
38
36
34
32
30
28
26
1
23
VGS/V
4
5
Fig.7. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(VGS); conditions: ID = 25 A;
Drain current, ID (A)
40
VDS > ID X RDS(ON)
35
30 Tj = 25 C
25
175 C
20
15
10
5
0
01234567
Gate-source voltage, VGS (V)
8
9
Fig.8. Typical transfer characteristics.
ID = f(VGS)
10
70
gfs/S
60
50
40
30
20
10
0
0 10 ID/A 20 30 40
Fig.9. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID)
3a
Rds(on) normalised to 25degC
2.5
2
1.5
1
0.5
-100
-50
0 50 100 150 200
Tmb / degC
Fig.10. Normalised drain-source on-state resistance.
R /RDS(ON) DS(ON)25 ˚C = f(Tj)
December 1999
4
Rev 1.000

4페이지










BUK7640-100A 전자부품, 판매, 대치품
Philips Semiconductors
TrenchMOStransistor
Standard level FET
MECHANICAL DATA
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads
(one lead cropped)
Product specification
BUK7640-100A
SOT404
D1
D
HD
E
2
13
ee
b
A
A1
mounting
base
Lp
c
Q
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A A1 b
D
c max. D1
mm 4.50 1.40 0.85 0.64 11 1.60
4.10 1.27 0.60 0.46
1.20
E
10.30
9.70
e
2.54
Lp HD Q
2.90 15.40 2.60
2.10 14.80 2.20
OUTLINE
VERSION
SOT404
IEC
REFERENCES
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
98-12-14
99-06-25
Fig.20. SOT404 surface mounting package. Centre pin connected to mounting base.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
December 1999
7
Rev 1.000

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BUK7640-100A

TrenchMOS transistor Standard level FET

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