|
|
PDF BUK9610-30 Data sheet ( Hoja de datos )
| Número de pieza | BUK9610-30 | |
| Descripción | TrenchMOS transistor Logic level FET | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de BUK9610-30 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
BUK9610-30
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope suitable for surface
mounting using ’trench’ technology.
The device features very low on-state
resistance and has integral zener
diodes giving ESD protection up to
2kV. It is intended for use in
automotive and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 5 V
MAX.
30
75
142
175
10.5
PINNING - SOT404
PIN DESCRIPTION
1 gate
2 drain
3 source
mb drain
PIN CONFIGURATION
mb
2
13
SYMBOL
d
g
s
UNIT
V
A
W
˚C
mΩ
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
RGS = 20 kΩ
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
minimum footprint, FR4
board
ESD LIMITING VALUE
SYMBOL
VC
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
10
75
53
240
142
175
UNIT
V
V
V
A
A
A
W
˚C
TYP.
-
50
MAX.
1.05
-
UNIT
K/W
K/W
MIN.
-
MAX.
2
UNIT
kV
December 1997
1
Rev 1.100
1 page  
Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
BUK9610-30
ID / A
100
80
Tj / C = 25
9510-30
175
60
40
20
0
0246
VGS / V
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
gfs / S
80
9510-30
60
Tj / C = 25
40
175
20
0
0 20 40 60 80 100
ID / A
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID); conditions: VDS = 25 V
a
2
30V TrenchMOS
1.5
1
0.5
0
-100
-50
0 50 100 150 200
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V
VGS(TO) / V
2.5
max.
2
typ.
1.5
min.
1
BUK959-60
0.5
0
-100
-50
0 50
Tj / C
100 150 200
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ 98%
1E-04
1E-05
1E-05
0 0.5 1 1.5 2 2.5
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
3
C / pF
10000
9510-30
Ciss
1000
Coss
Crss
100
0.1
1 10
VDS / V
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
December 1997
5
Rev 1.100
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet BUK9610-30.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| BUK9610-30 | TrenchMOS transistor Logic level FET | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |