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PDF BULD50KC Data sheet ( Hoja de datos )

Número de pieza BULD50KC
Descripción NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
Fabricantes Power Innovations Limited 
Logotipo Power Innovations Limited Logotipo



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Copyright © 1997, Power Innovations Limited, UK
BULD50KC, BULD50SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
FEBRUARY 1994 - REVISED SEPTEMBER 1997
q Designed Specifically for High Frequency
Electronic Ballasts
TO-220 PACKAGE
(TOP VIEW)
q Integrated Fast trr Anti-Parallel Diode,
Enhancing Reliability
q Diode trr Typically 1 µs
q New Low-Height SL Power Package,
TO220 Pin-Compatible
q Tightly Controlled Transistor Storage Times
B1
C2
E3
Pin 2 is in electrical contact with the mounting base.
MDTRACA
q Voltage Matched Integrated Transistor and
Diode
SL PACKAGE
(TOP VIEW)
q Characteristics Optimised for Cool Running
q Diode-Transistor Charge Coupling
Minimised to Enhance Frequency Stability
description
The new BULDxx range of transistors have been
designed specifically for use in High Frequency
Electronic Ballasts (HFEB’s). This range of
switching transistors has tightly controlled
storage times and an integrated fast trr anti-
parallel diode. The revolutionary design ensures
that the diode has both fast forward and reverse
recovery times, achieving the same performance
as a discrete anti-parallel diode plus transistor.
The integrated diode has minimal charge
coupling with the transistor, increasing frequency
stability, especially in lower power circuits where
the circulating currents are low. By design, this
new device offers a voltage matched integrated
transistor and anti-parallel diode.
B
C
E
device symbol
B
1
2
3
C
E
absolute maximum ratings at 25°C ¦ (unless otherwise noted)
RATING
Collector-emitter voltage (VBE = 0)
Collector-base voltage (IE = 0)
Collector-emitter voltage (IB = 0)
Emitter-base voltage
Continuous collector current
Peak collector current (see Note 2)
Continuous base current
Peak base current (see Note 2)
NOTES: 1. This value applies for tp = 1 s.
2. This value applies for tp = 10 ms, duty cycle 2%.
BULD50KC
BULD50SL (see Note 1)
BULD50KC
BULD50SL (see Note 1)
¦ 25°C case temperature for BULD50KC, and 25°C ambient temperature for BULD50SL
SYMBOL
VCES
VCBO
VCEO
VEBO
IC
ICM
IB
IBM
VALUE
600
600
400
9
3.5
6
1.5
2.5
UNIT
V
V
V
V
A
A
A
A
PRODUCT INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
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BULD50KC pdf
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BULD50KC, BULD50SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
FEBRUARY 1994 - REVISED SEPTEMBER 1997
THERMAL INFORMATION
THERMAL RESPONSE JUNCTION TO AMBIENT
vs
POWER PULSE DURATION
LDX50CZA
BULD50KC
TA = 25°C
0%
0·01
0·001
10-4
10-3
duty cycle = t1/t2
Read time at end of t1,
t1
t2
TJ (max)
TA
=
PD (peak)
RZθθJJAA
RθJA (max)
10-2
10-1
100
101
102
103
t1 - Power Pulse Duration - s
Figure 7.
0·1
60%
40%
20%
10%
0·01
0%
0·001
10-4
THERMAL RESPONSE JUNCTION TO AMBIENT
vs
POWER PULSE DURATION
LDX50SZA
BULD50SL
TA = 25°C
duty cycle = t1/t2
Read time at end of t1,
t1
t2
TJ (max)
TA
=
PD (peak)
RZθθJJAA
RθJA (max)
10-3
10-2
10-1
100
101
102
103
t1 - Power Pulse Duration - s
Figure 8.
PRODUCT INFORMATION
5

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