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PDF BR24E16F Data sheet ( Hoja de datos )
| Número de pieza | BR24E16F | |
| Descripción | I2C BUS compatible serial EEPROM | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Memory Ics
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
I2C BUS compatible serial EEPROM
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV /
BR24C16 / BR24C16F / BR24C16FJ / BR24C16FV /
BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV /
The BR24C08, BR24C16 and BR24E16 series are 2-wire (I2C BUS type) serial EEPROMs which are electrically
programmable.
∗I2C BUS is a registered trademark of Philips.
zFeatures
1) 1k x 8 bits serial EEPROM.
(BR24C08 / F / FJ / FV)
2k x 8 bits serial EEPROM.
(BR24C16 / F / FJ / FV, BR24E16 / F / FJ / FV)
2) Two wire serial interface.
(2Byte Address : BR24E16)
3) Operating voltage range : 2.7V∼5.5V
4) Low current consumption
Active (at 5V) : 2.0mA (Typ.)
Standby (at 5V) : 1.0µA (Typ.)
5) Auto erase and auto complete functions can be used
during write operations.
6) Page write function : 16byte
7) DATA security
Write protect feature
Inhibit to WRITE at low Vcc
8) Noise filters at SCL and SDA pins.
9) Address can be incremented automatically during
read operations.
10) Compact packages.
11) Rewriting possible up to 100,000 times.
12) Data can be stored for ten years without corruption.
zAbsolute maximum ratings (Ta=25°C)
Parameter
Symbol
Limits
Supply voltage
VCC −0.3~+6.5
300(SSOP−B8)
∗1
Power dissipation
Pd 450(SOP8, SOP−J8) ∗2
800(DIP8)
∗3
Storage temperature range
Tstg
−65~+125
Operating temperature range
Topr
−40~+85
Terminal voltage
− −0.3~VCC+0.3
∗1 Reduced by 3.0mW for each increase in Ta of 1°C over 25°C.
∗2 Reduced by 3.5mW for each increase in Ta of 1°C over 25°C.
∗3 Reduced by 5.0mW for each increase in Ta of 1°C over 25°C.
Unit
V
mW
°C
°C
V
zRecommended operating conditions (Ta=25°C)
Parameter
Symbol
Limits
Power supply voltage
Input voltage
VCC
VIN
2.7~5.5
0~VCC
Unit
V
V
1 page  
Memory Ics
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
(4) Device addressing
BR24C08 / F / FJ / FV
1) Make sure the slave address is output from the master in continuation with the start condition.
2) The upper 4bits of the slave address are used to determine the device type. The device code for this IC is fixed at
“1010”.
3) The next 1bit of the slave address (A2 … device address) are used to select the device. This IC can address up to
two devices on the same bus.
4) The next 2bits (P1, P0 … page select) are used by the master to select four 256 word page of memory.
P1, P0 set to ‘0’ ‘0’ $ $ $ $ $ $ $ 1 page (000 ~0FF)
P1, P0 set to ‘0’ ‘1’ $ $ $ $ $ $ $ 2 page (100 ~1FF)
P1, P0 set to ‘1’ ‘0’ $ $ $ $ $ $ $ 3 page (200 ~2FF)
P1, P0 set to ‘1’ ‘1’ $ $ $ $ $ $ $ 4 page (300 ~3FF)
5) The lowermost bit of the slave address (R / W … READ / WRITE) is used to set the write or read mode as follows.
R / W set to 0 … Write
(Random read word address setting is also 0)
R / W set to 1 … Read
1010
A2
P1
P0 R / W
BR24C16 / F / FJ / FV
1) Make sure the slave address is output from the master in continuation with the start condition.
2) The upper 4bits of the slave address are used to determine the device type. The device code for this IC is fixed at
“1010”.
3) The next 3bits (P2, P1, P0 … page select) are used by the master to select four 256 word page of memory.
P2, P1, P0 set to ‘0’ ‘0’ ‘0’$ $ $ $ $ $ $ 1 page (000 ~0FF)
P2, P1, P0 set to ‘0’ ‘0’ ‘1’$ $ $ $ $ $ $ 2 page (100 ~1FF)
::
P2, P1, P0 set to ‘1’ ‘1’ ‘1’$ $ $ $ $ $ $ 8 page (700 ~7FF)
4) The lowermost bit of the slave address (R / W … READ / WRITE) is used to set the write or read mode as follows.
R / W set to 0 … Write
(Random read word address setting is also 0)
R / W set to 1 … Read
1010
P2
P1
P0 R / W
BR24E16 / F / FJ / FV
1) Make sure the slave address is output from the master in continuation with the start condition.
2) The upper 4bits of the slave address are used to determine the device type. The device code for this IC is fixed at
“1010”.
3) The next 3bits of the slave address (A2, A1, A0 … device address) are used to select the device. This IC can
address up to eight devices on the same bus.
4) The lowermost bit of the slave address (R / W … READ / WRITE) is used to set the write or read mode as follows.
R / W set to 0 … Write
(Random read word address setting is also 0)
R / W set to 1 … Read
1010
A2
A1
A0 R / W
5 Page 
Memory Ics
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
(11) Sequential read
BR24C08 / F / FJ / FV
S
T
A
R SLAVE
T ADDRESS
R
E
A
D
DATA(n)
SDA
LINE
1 0 1 0 A2 P1 P0
D7
D0
RA
/C
WK
A
C
K
Fig.16
DATA(n+x)
S
T
O
P
D7 D0
AA
CC
KK
BR24C16 / F / FJ / FV
S
T
A
R SLAVE
T ADDRESS
R
E
A
D
DATA(n)
SDA
LINE
1 0 1 0 P2 P1 P0
D7
D0
RA
/C
WK
A
C
K
Fig.17
DATA(n+x)
S
T
O
P
D7 D0
AA
CC
KK
BR24E16 / F / FJ / FV
S
T
A
R SLAVE
T ADDRESS
R
E
A
D
DATA(n)
SDA
LINE
1 0 1 0 A2 A1 A0
D7
D0
RA
/C
WK
A
C
K
Fig.18
DATA(n+x)
S
T
O
P
D7 D0
AA
CC
KK
$ When an ACK signal LOW is detected after D0 and a stop condition is not sent from the master (µ-COM), the
next word address data can be read. [All words can be read]
$ This command is ended by inputting a HIGH signal to the ACK signal after D0 and raising the SDA signal (stop
condition) using the SCL signal HIGH.
$ Sequential reading can also be done with a random read.
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet BR24E16F.PDF ] | |
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