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PDF BRR1A16E Data sheet ( Hoja de datos )
| Número de pieza | BRR1A16E | |
| Descripción | Quad Differential Receivers BRF1A/ BRF2A/ BRS2B/ BRR1A/ and BRT1A | |
| Fabricantes | Agere Systems | |
| Logotipo |  |
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Data Sheet
April 2001
Quad Differential Receivers
BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A
Features
s Pin equivalent to the general-trade 26LS32 device,
with improved speed, reduced power consumption,
and significantly lower levels of EMI
s High input impedance approximately 8 kΩ
s Four line receivers per package
s 400 Mbits/s maximum data rate when used with
Agere Systems Inc. data transmission drivers
s Meets enhanced small device interface (ESDI)
standards
s 4.0 ns maximum propagation delay
s <0.20 V input sensitivity
s −1.2 V to +7.2 V common-mode range
s −40 °C to +125 °C ambient operating temperature
range (wider than the 41 Series)
s Single 5.0 V ± 10% supply
s Output defaults to logic 1 when inputs are left
open*
s Available in four package types
s Lower power requirement than the 41 Series
Description
These quad differential receivers accept digital data
over balanced transmission lines. They translate
differential input logic levels to TTL output logic
levels. All devices in this family have four receivers
with a common enable control. These receivers are
pin equivalent to the general-trade 26LS32, but offer
increased speed and decreased power consumption.
They replace the Agere 41 Series receivers.
* This feature is available on BRF1A and BRF2A.
The BRF1A device is the generic receiver in this
family and requires the user to supply external
resistors on the circuit board for impedance
matching.
The BRF2A is identical to the BRF1A, but has an
electrostatic discharge (ESD) protection circuit
added to significantly improve the ESD human-body
model (HBM) characteristics on the differential input
terminals.
The BRS2B is identical to the BRF2A, but has a
preferred state feature that places the output in the
high state when the inputs are open, shorted to
ground, or shorted to the power supply.
The BRR1A is equivalent to the BRF1A, but has a
110 Ω resistor connected across the differential
inputs. This eliminates the need for an external
resistor when terminating a 100 Ω impedance line.
This device is designed to work with the DP1A or
PNPA in point-to-point applications.
The BRT1A is equivalent to the BRF1A; however, it
is provided with a Y-type resistor network across the
differential inputs and terminated to ground. The
Y-type termination provides the best EMI results.
This device is not recommended for applications
where the differences in ground voltage between the
driver and the receiver exceed 1 V. This device is
designed to work with the DG1A or PNGA in point-to-
point applications.
The powerdown loading characteristics of the
receiver input circuit are approximately 8 kΩ relative
to the power supplies; hence, they will not load the
transmission line when the circuit is powered down.
For those circuits with termination resistors, the line
will remain impedance matched when the circuit is
powered down.
The packaging options that are available for these
quad differential line drivers include a 16-pin DIP; a
16-pin, J-lead SOJ; a 16-pin, gull-wing small-outline
integrated circuit (SOIC); and a 16-pin, narrow-body,
gull-wing SOIC.
1 page  
Data Sheet
April 2001
Quad Differential Receivers
BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A
Timing Characteristics (continued)
INPUT
INPUT
OUTPUT
tPHL
80%
20%
ttHL
tPLH
20%
80%
ttLH
Figure 4. Receiver Propagation Delay Timing
3.7 V
3.2 V
2.7 V
VOH
1.5 V
VOL
12-2251.b(F)
E1*
E2†
VOH
OUTPUT
VOL
tPHZ
* E2 = 1 while E1 changes state.
† E1 = 0 while E2 changes state.
tPZH
tPLZ
∆V = 0.5 V
∆V = 0.5 V
∆V = 0.5 V
Figure 5. Receiver Enable and Disable Timing
3V
1.5 V
0V
3V
1.5 V
0V
tPZL
∆V = 0.5 V
12-253.b(F)
Test Conditions
Parametric values specified under the Electrical Characteristics and Timing Characteristics sections for the data
transmission driver devices are measured with the following output load circuits.
TO OUTPUT OF
DEVICE UNDER
TEST
CL
15 pF*
5V
2 kΩ
5 kΩ
* Includes probe and jig capacitances.
Note: All 458E, IN4148, or equivalent diodes.
Agere Systems Inc.
Figure 6. Receiver Propagation Delay Test Circuit
12-2249(F)
5
5 Page 
Data Sheet
April 2001
Outline Diagrams (continued)
16-Pin SOIC (SOJ)
Dimensions are in millimeters.
L
N
Quad Differential Receivers
BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A
B
1
PIN #1 IDENTIFIER ZONE
W
1.27 TYP
0.51 MAX
H
SEATING PLANE
0.10
0.79 MAX
5-4413(F)
Package
Description
Small-Outline,
J-Lead (SOJ)
Number of
Pins
(N)
16
Maximum Length
(L)
10.41
Package Dimensions
Maximum Width Maximum Width
Without Leads Including Leads
(B) (W)
7.62 8.81
Maximum Height
Above Board
(H)
3.18
Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts,
please contact your Agere Systems sales representative.
Agere Systems Inc.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet BRR1A16E.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| BRR1A16E | Quad Differential Receivers BRF1A/ BRF2A/ BRS2B/ BRR1A/ and BRT1A | Agere Systems |
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| BRR1A16G-TR | Quad Differential Receivers BRF1A/ BRF2A/ BRS2B/ BRR1A/ and BRT1A | Agere Systems |
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