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BS616LV8015BC 데이터시트 PDF




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부품번호 BS616LV8015BC 기능
기능 Very Low Power/Voltage CMOS SRAM 512K X 16 bit
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BS616LV8015BC 데이터시트, 핀배열, 회로
BSI Very Low Power/Voltage CMOS SRAM
512K X 16 bit
BS616LV8015
„ FEATURES
• Very low operation voltage : 4.5~5.5V
• Very low power consumption :
Vcc = 5.0V C-grade: 45mA (Max.) operating current
I-grade : 50mA (Max.) operating current
3uA (Typ.) CMOS standby current
• High speed access time :
-55 70ns (Max.) at Vcc=5V
-70 70ns (Max.) at Vcc=5V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1,CE2 and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
„ DESCRIPTION
The BS616LV8015 is a high performance, very low power CMOS Static
Random Access Memory organized as 524,288 words by 16 bits and
operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 3uA and maximum access time of 55/70ns in 5V operation.
Easy memory expansion is provided by an active LOW chip enable(CE1),
active HIGH chip enable (CE2), active LOW output enable(OE) and
three-state output drivers.
The BS616LV8015 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV8015 is available in 48-pin BGA package.
„ PRODUCT FAMILY
PRODUCT FAMILY
BS616LV8015BC
BS616LV8015BI
OPERATING
TEMPERATURE
Vcc
RANGE
+0 O C to +70 O C 4.5V ~ 5.5V
-40 O C to +85 O C 4.5V ~ 5.5V
SPEED
(ns)
Vcc=5V
55 / 70
55 / 70
POWER DISSIPATION
STANDBY
(ICCSB1, Max)
Operating
(ICC, Max)
Vcc=5V
Vcc=5V
30uA
45mA
100uA
50mA
PKG TYPE
BGA-48-0810
BGA-48-0810
„ PIN CONFIGURATIONS
„ BLOCK DIAGRAM
123456
A LB OE A0 A1 A2 CE2
B D8 UB A3 A4 CE1 D0
C D9 D10 A5 A6 D1 D2
D VSS D11 A17 A7 D3 VCC
E VCC D12 VSS A16 D4 VSS
F D14 D13 A14 A15 D5 D6
G D15 N.C A12 A13 WE D7
H A18 A8 A9 A10 A11 NC
48-Ball CSP top View
A4
A3
A2
A1
A0
A17
A16
A15
A14
A13
A12
D0
.
.
.
.
D15
Address
Input
Buffer
22
Row
2048
Decoder
Data
16
Input
16
. Buffer
.
. 16
.
Data
Output
16
Buffer
Memory Array
2048 x 4096
4096
Column I/O
Write Driver
Sense Amp
256
Column Decoder
CE2
CE1
WE
OE
UB
LB
Vcc
Gnd
Control
16
Address Input Buffer
A11 A10 A9 A8 A7 A6 A5 A18
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
R0201-BS616LV8015
1
Revision 2.4
April 2002




BS616LV8015BC pdf, 반도체, 판매, 대치품
BSI
BS616LV8015
„ AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
„ KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
OUTPUTS
MUST BE
STEADY
„ AC TEST LOADS AND WAVEFORMS
5.0V
OUTPUT
1928
5.0V
OUTPUT
1928
INCLUDING
JIG AND
SCOPE
100PF
1020
INCLUDING
JIG AND
SCOPE
5PF
1020
FIGURE 1A
OUTPUT
THEVENIN EQUIVALENT
667
FIGURE 1B
1.73V
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
DON , T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
ALL INPUT PULSES
Vcc
GND
10%
90% 90%
←→
10%
5ns
FIGURE 2
„ AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC, Vcc=5V)
READ CYCLE
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
BS616LV8015-70
MIN. TYP. MAX.
t
AVAX
t
RC
Read Cycle Time
70 -- --
t
AVQV
t
AA
Address Access Time
-- -- 70
t
ELQV
t
ACS1
Chip Select Access Time
(CE1) -- -- 70
t
ELQV
t
ACS2
Chip Select Access Time
(CE2) -- -- 70
t
BA
t (1)
BA
Data Byte Control Access Time
(LB,UB) --
-- 35
t
GLQV
t
OE
Output Enable to Output Valid
-- -- 35
t
ELQX
t
CLZ
Chip Select to Output Low Z
(CE2,CE1) 10 --
--
t
BE
t
BE
Data Byte Control to Output Low Z (LB,UB) 10 --
--
t
GLQX
t
OLZ
Output Enable to Output in Low Z
10 -- --
t
EHQZ
t
CHZ
Chip Deselect to Output in High Z (CE2,CE1) 0
-- 35
t
BDO
t
BDO
Data Byte Control to Output High Z (LB,UB) 0
-- 35
t
GHQZ
t
OHZ
Output Disable to Output in High Z
0 -- 30
t
AXOX
t
OH
Output Disable to Address Change
10 -- --
BS616LV8015-55
MIN. TYP. MAX.
55 -- --
-- -- 55
-- -- 55
-- -- 55
-- -- 30
-- -- 30
10 -- --
10 -- --
10 -- --
0 -- 30
0 -- 30
0 -- 25
10 -- --
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE :
1. tBA is 35ns/30ns (@speed=70ns/55ns) with address toggle .
tBA is 70ns/55ns (@speed=70ns/55ns) without address toggle .
R0201-BS616LV8015
4
Revision 2.4
April 2002

4페이지










BS616LV8015BC 전자부품, 판매, 대치품
BSI
WRITE CYCLE2 (1,6)
ADDRESS
BS616LV8015
t WC
CE2
CE1
LB,UB
WE
D OUT
D IN
t AS
(11)
t CW
(5)
t BW
(5)
t AW
(4,10)
t WHZ
t WP
(2)
t DW
t WR (3)
t DH
(7)
t DH
(8,9)
(8)
NOTES:
1. WE must be high during address transitions.
2. The internal write time of the memory is defined by the overlap of CE2, CE1 and WE low. All signals
must be active to initiate a write and any one signal can terminate a write by going inactive.
The data input setup and hold timing should be referenced to the second transition edge of
the signal that terminates the write.
3. TWR is measured from the earlier of CE2 going low, or CE1 or WE going high at the end of write cycle.
4. During this period, DQ pins are in the output state so that the input signals of opposite phase
to the outputs must not be applied.
5. If the CE2 high transition or CE1 low transition occurs simultaneously with the WE low transitions or after the WE
transition, output remain in a high impedance state.
6. OE is continuously low (OE = VIL ).
7. DOUT is the same phase of write data of this write cycle.
8. DOUT is the read data of next address.
9. If CE2 is high or CE1 is low during this period, DQ pins are in the output state. Then the data input signals of
opposite phase to the outputs must not be applied to them.
10. Transition is measured ± 500mV from steady state with CL = 5pF as shown in Figure 1B.
The parameter is guaranteed but not 100% tested.
11. TCW is measured from the later of CE2 going high or CE1 going low to the end of write.
R0201-BS616LV8015
7
Revision 2.4
April 2002

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관련 데이터시트

부품번호상세설명 및 기능제조사
BS616LV8015BC

Very Low Power/Voltage CMOS SRAM 512K X 16 bit

Brilliance Semiconductor
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BS616LV8015BI

Very Low Power/Voltage CMOS SRAM 512K X 16 bit

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