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PDF AT49LV020-12VI Data sheet ( Hoja de datos )

Número de pieza AT49LV020-12VI
Descripción 2-Megabit 256K x 8 Single 2.7-volt Battery-Voltage Flash Memory
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Single Supply Voltage, Range 2.7V to 3.6V
Single Supply for Read and Write
Fast Read Access Time - 70 ns
Internal Program Control and Timer
8K bytes Boot Block With Lockout
Fast Erase Cycle Time - 10 seconds
Byte By Byte Programming - 30 µs/Byte typical
Hardware Data Protection
DATA Polling For End Of Program Detection
Low Power Dissipation
– 25 mA Active Current
– 50 µA CMOS Standby Current
Typical 10,000 Write Cycles
Description
The AT49BV020 and the AT49LV020 are 3-volt-only, 2 megabit Flash memories
organized as 262,144 words of 8 bits each. Manufactured with Atmel's advanced non-
volatile CMOS technology, the devices offer access times to 70 ns with power dissipa-
tion of just 90 mW over the commercial temperature range. When the device is dese-
lected, the CMOS standby current is less than 50 µA.
To allow for simple in-system reprogrammability, the AT49BV/LV020 does not require
high input voltages for programming. Three-volt-only commands determine the read
and programming operation of the device. Reading data out of the device is similar to
reading from an EPROM. Reprogramming the AT49BV/LV020 is performed by eras-
ing the entire 2 megabits of memory and then programming on a byte by byte basis.
The typical byte programming time is a fast 30 µs. The end of a program cycle can be
optionally detected by the DATA polling feature. Once the end of a byte program cycle
has been detected, a new access for a read or program can begin. The typical num-
ber of program and erase cycles is in excess of 10,000 cycles.
Pin Configuration
(continued)
Pin Name
A0 - A17
CE
OE
WE
I/O0 - I/O7
NC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
VSOP Top View (8 x 14mm) or
TSOP Top View (8 x 20mm)
Type 1
PLCC Top View
2-Megabit
(256K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV020
AT49LV020
Rev. 0678C–03/98
1

1 page




AT49LV020-12VI pdf
AT49BV020
AC Read Characteristics
Symbol
tACC
tCE(1)
tOE(2)
tDF(3)(4)
tOH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
Output Hold from OE, CE or Address,
whichever occurred first
AC Read Waveforms(1)(2)(3)(4)
ADDRESS
-70
Min Max
70
70
0 35
0 25
AT49BV/LV020
-90
Min Max
90
90
0 40
0 25
-12
Min Max
120
120
0 50
0 30
000
Units
ns
ns
ns
ns
ns
ADDRESS VALID
CE
OE
OUTPUT
tCE
tOE
tACC
HIGH Z
tOH
OUTPUT VALID
tDF
Notes: 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change
without impact on tACC.
3. tDF is specified from OE or CE whichever occurs first (CL = 5pF).
4. This parameter is characterized and is not 100% tested.
Output Test Load
Input Test Waveforms and Measurement Level
3.0V
AC 2.4V
DRIVING
LEVELS 0.4V
tR, tF < 5 ns
1.5V
AC
MEASUREMENT
LEVEL
1.8K
1.3K
OUTPUT
PIN
100 pF
Pin Capacitance (f = 1 MHz, T = 25°C)(1)
Typ Max
CIN
COUT
Note:
46
8 12
1. This parameter is characterized and is not 100% tested.
Units
pF
pF
Conditions
VIN = 0V
VOUT = 0V
5

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