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부품번호 | AT80F51-16AI 기능 |
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기능 | 8-Bit Microcontroller with 4K Bytes QuickFlash Memory | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
Features
• Compatible with MCS-51™ Products
• 4K Bytes of Factory Programmable QuickFlash™ Memory
• Fully Static Operation: 0 Hz to 20 MHz
• Three-Level Program Memory Lock
• 128 x 8-Bit Internal RAM
• 32 Programmable I/O Lines
• Two 16-Bit Timer/Counters
• Six Interrupt Sources
• Programmable Serial Channel
• Low Power Idle and Power Down Modes
Description
The AT80F51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K
bytes of QuickFlash Memory. The device is manufactured using Atmel’s high density
nonvolatile memory technology and is compatible with the industry standard MCS-
51™ instruction set and pinout. The on-chip QuickFlash allows custom codes to be
quickly programmed in the factory. By combining a versatile 8-bit CPU with Quick-
Flash on a monolithic chip, the Atmel AT80F51 is a powerful microcomputer which
provides a highly flexible and cost effective solution to many embedded control appli-
cations.
(continued)
Pin Configurations
TQFP
INDEX
CORNER
P1.5
P1.6
P1.7
RST
(RXD) P3.0
NC
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
4
44
34
24
14
03
93
83
73
6
3
3
5
4
1 33
2 32
3 31
4 30
5 29
6 28
7 27
8 26
9 25
10 24
11 23
1
21
31
41
51
61
71
1
8
9
2
02
12
2
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA
NC
ALE
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
PDIP
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD) P3.0
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
X TA L 2
X TA L 1
GND
1 40
2 39
3 38
4 37
5 36
6 35
7 34
8 33
9 32
10 31
11 30
12 29
13 28
14 27
15 26
16 25
17 24
18 23
19 22
20 21
PLCC
VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA
ALE
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P2.4 (A12)
P2.3 (A11)
P2.2 (A10)
P2.1 (A9)
P2.0 (A8)
INDEX
CORNER
(RXD)
(TXD)
(INT0)
(INT1)
(T0)
(T1)
P1.5
P1.6
P1.7
RST
P3.0
NC
P3.1
P3.2
P3.3
P3.4
P3.5
6 4 2 44 42 40
7 5 3 1 43 4139
8 38
9 37
10 36
11 35
12 34
13 33
14 32
15 31
16 30
11781 92 02 12 22 32 42 52 62 72289
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA
NC
ALE
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
8-Bit
Microcontroller
with 4K Bytes
QuickFlash™
Memory
AT80F51
0979A-A–12/97
3-3
cycle, except that two PSEN activations are skipped during
each access to external data memory.
EA
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external pro-
gram memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset.
EA should be strapped to VCC for internal program execu-
tions.
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
an unexpected write to a port pin when Idle is terminated by
reset, the instruction following the one that invokes Idle
should not be one that writes to a port pin or to external
memory.
Figure 1. Oscillator Connections
C2
XTAL2
C1
XTAL1
GND
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively,
of an inverting amplifier which can be configured for use as
an on-chip oscillator, as shown in Figure 1. Either a quartz
crystal or ceramic resonator may be used. To drive the
device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven as shown in Figure 2.
There are no requirements on the duty cycle of the external
clock signal, since the input to the internal clocking circuitry
is through a divide-by-two flip-flop, but minimum and maxi-
mum voltage high and low time specifications must be
observed.
Note: C1, C2 = 30 pF ± 10 pF for Crystals
= 40 pF ± 10 pF for Ceramic Resonators
Figure 2. External Clock Drive Configuration
Idle Mode
In idle mode, the CPU puts itself to sleep while all the on-
chip peripherals remain active. The mode is invoked by
software. The content of the on-chip RAM and all the spe-
cial functions registers remain unchanged during this
mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
It should be noted that when idle is terminated by a hard
ware reset, the device normally resumes program execu-
tion, from where it left off, up to two machine cycles before
the internal reset algorithm takes control. On-chip hardware
inhibits access to internal RAM in this event, but access to
the port pins is not inhibited. To eliminate the possibility of
Power Down Mode
In the power down mode the oscillator is stopped, and the
instruction that invokes power down is the last instruction
executed. The on-chip RAM and Special Function Regis-
ters retain their values until the power down mode is termi-
Status of External Pins During Idle and Power Down Modes
Mode
Idle
Idle
Power Down
Power Down
Program Memory
Internal
External
Internal
External
ALE
1
1
0
0
PSEN
1
1
0
0
PORT0
Data
Float
Data
Float
PORT1
Data
Data
Data
Data
PORT2
Data
Address
Data
Data
PORT3
Data
Data
Data
Data
3-6 AT80F51
4페이지 AT80F51
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage............................................. 6.6V
DC Output Current...................................................... 15.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
DC Characteristics
TA = -40°C to 85°C, VCC = 5.0V ± 20% (unless otherwise noted)
Symbol
Parameter
Condition
Min Max Units
VIL
VIL1
VIH
VIH1
VOL
VOL1
Input Low Voltage
Input Low Voltage (EA)
Input High Voltage
Input High Voltage
Output Low Voltage(1) (Ports 1,2,3)
Output Low Voltage(1)
(Port 0, ALE, PSEN)
(Except EA)
(Except XTAL1, RST)
(XTAL1, RST)
IOL = 1.6 mA
IOL = 3.2 mA
-0.5
-0.5
0.2 VCC + 0.9
0.7 VCC
0.2 VCC - 0.1
0.2 VCC - 0.3
VCC + 0.5
VCC + 0.5
0.45
0.45
V
V
V
V
V
V
VOH
VOH1
IIL
ITL
Output High Voltage
(Ports 1,2,3, ALE, PSEN)
Output High Voltage
(Port 0 in External Bus Mode)
Logical 0 Input Current (Ports 1,2,3)
Logical 1 to 0 Transition Current
(Ports 1,2,3)
IOH = -60 µA, VCC = 5V ± 10%
IOH = -25 µA
IOH = -10 µA
IOH = -800 µA, VCC = 5V ± 10%
IOH = -300 µA
IOH = -80 µA
VIN = 0.45V
VIN = 2V, VCC = 5V ± 10%
2.4
0.75 VCC
0.9 VCC
2.4
0.75 VCC
0.9 VCC
-50
-650
V
V
V
V
V
V
µA
µA
ILI
RRST
Input Leakage Current (Port 0, EA)
Reset Pulldown Resistor
0.45 < VIN < VCC
±10 µA
50 300 KΩ
CIO
ICC
Notes:
Pin Capacitance
Power Supply Current
Test Freq. = 1 MHz, TA = 25°C
Active Mode, 12 MHz
10 pF
20 mA
Idle Mode, 12 MHz
5 mA
Power Down Mode(2)
VCC = 6V
100 µA
VCC = 3V
40 µA
1. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin: 10 mA
Maximum IOL per 8-bit port: Port 0: 26 mA
Ports 1, 2, 3: 15 mA
Maximum total IOL for all output pins: 71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test conditions.
2. Minimum VCC for Power Down is 2V.
3-9
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
AT80F51-16AC | 8-Bit Microcontroller with 4K Bytes QuickFlash Memory | ATMEL Corporation |
AT80F51-16AI | 8-Bit Microcontroller with 4K Bytes QuickFlash Memory | ATMEL Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |