Datasheet.kr   

AT89LS53-12AI 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT89LS53-12AI은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 AT89LS53-12AI 자료 제공

부품번호 AT89LS53-12AI 기능
기능 8-Bit Microcontroller with 12K Bytes Flash
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


AT89LS53-12AI 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 30 페이지수

미리보기를 사용할 수 없습니다

AT89LS53-12AI 데이터시트, 핀배열, 회로
AT89LS53
Features
Compatible with MCS-51Products
12K Bytes of In-System Reprogrammable Downloadable Flash Memory
- SPI Serial Interface for Program Downloading
- Endurance: 1,000 Write/Erase Cycles
2.7V to 6V Operating Range
Fully Static Operation: 0 Hz to 12 MHz
Three-Level Program Memory Lock
256 x 8 bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
Nine Interrupt Sources
Programmable UART Serial Channel
SPI Serial Interface
Low Power Idle and Power Down Modes
Interrupt Recovery From Power Down
Programmable Watchdog Timer
Dual Data Pointer
Power Off Flag
Description
The AT89LS53 is a low-power, wide-voltage range, high-performance CMOS 8-bit
microcomputer with 12K bytes of downloadable Flash programmable and erasable
read only memory. The device is manufactured using Atmel’s high density nonvolatile
memory technology and is compatible with the industry standard 80C51 instruction
set and pinout. The on-chip downloadable Flash allows the program memory to be
reprogrammed in-system through an SPI serial interface or by a conventional nonvol-
atile memory programmer. By combining a versatile 8-bit CPU with downloadable
Flash on a monolithic chip, the Atmel AT89LS53 is a powerful microcomputer which
provides a highly flexible and cost effective solution to many embedded control appli-
cations.
The AT89LS53 provides the following standard features: 12K bytes of downloadable
Flash, 256 bytes of RAM, 32 I/O lines, programmable watchdog timer, two Data Point-
ers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full
duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89LS53 is
designed with static logic for operation down to zero frequency and supports two soft-
ware selectable power saving modes. The Idle Mode stops the CPU while allowing
the RAM, timer/counters, serial port, and interrupt system to continue functioning. The
Power Down Mode saves the RAM contents but freezes the oscillator, disabling all
other chip functions until the next interrupt or hardware reset.
The downloadable Flash can be changed a single byte at a time and is accessible
through the SPI serial interface. Holding RESET active forces the SPI bus into a serial
programming interface and allows the program memory to be written to or read from
unless Lock Bit 2 has been activated.
8-Bit
Microcontroller
with 12K Bytes
Flash
AT89LS53
0851B-B–12/97
4-249




AT89LS53-12AI pdf, 반도체, 판매, 대치품
Pin Description
Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured
as the SPI slave port select, data input/output and shift
clock input/output pins as shown in the following table.
Port Pin Alternate Functions
P1.0
T2 (external count input to Timer/Counter
2), clock-out
P1.1
T2EX (Timer/Counter 2 capture/reload
trigger and direction control)
P1.4
SS (Slave port select input)
P1.5
MOSI (Master data output, slave data input
pin for SPI channel)
P1.6
MISO (Master data input, slave data output
pin for SPI channel)
P1.7
SCK (Master clock output, slave clock input
pin for SPI channel)
Port 1 also receives the low-order address bytes during
Flash programming and verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups.
The Port 2 output buffers can sink/source four TTL inputs.
When 1s are written to Port 2 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 2 pins that are externally being pulled low will source
current (IIL) because of the internal pullups.
Port 2 emits the high-order address byte during fetches
from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @
DPTR). In this application, Port 2 uses strong internal pul-
lups when emitting 1s. During accesses to external data
memory that use 8-bit addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some
control signals during Flash programming and verification.
Port 3
Port 3 is an 8 bit bidirectional I/O port with internal pullups.
The Port 3 output buffers can sink/source four TTL inputs.
When 1s are written to Port 3 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 3 pins that are externally being pulled low will source
current (IIL) because of the pullups.
Port 3 also serves the functions of various special features
of the AT89LS53, as shown in the following table.
Port 3 also receives some control signals for Flash pro-
gramming and verification.
Port Pin
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Alternate Functions
RXD (serial input port)
TXD (serial output port)
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (timer 0 external input)
T1 (timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
RST
Reset input. A high on this pin for two machine cycles while
the oscillator is running resets the device.
ALE/PROG
Address Latch Enable is an output pulse for latching the
low byte of the address during accesses to external mem-
ory. This pin is also the program pulse input (PROG) during
Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/
6 the oscillator frequency and may be used for external tim-
ing or clocking purposes. Note, however, that one ALE
pulse is skipped during each access to external data mem-
ory.
If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only dur-
ing a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no
effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external pro-
gram memory.
When the AT89LS53 is executing code from external pro-
gram memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during
each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external pro-
gram memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset.
EA should be strapped to VCC for internal program execu-
tions. This pin also receives the 12-volt programming
enable voltage (VPP) during Flash programming when 12-
volt programming is selected.
4-252 AT89LS53

4페이지










AT89LS53-12AI 전자부품, 판매, 대치품
AT89LS53
Dual Data Pointer Registers To facilitate accessing exter-
nal data memory, two banks of 16 bit Data Pointer Regis-
ters are provided: DP0 at SFR address locations 82H-83H
and DP1 at 84H-85H. Bit DPS = 0 in SFR WCON selects
DP0 and DPS = 1 selects DP1. The user should always ini-
talize the DPS bit to the appropriate value before accessing
the respective Data Pointer register.
Power Off Flag The Power Off Flag (POF) is located at
bit_4 (PCON.4) in the PCON SFR. POF is set to “1” during
power up. It can be set and reset under software control
and is not affected by RESET.
Table 3. WCON—Watchdog Control Register
WCON Address = 96H
Reset Value = 0000 0010B
PS2
PS1
PS0
reserved reserved DPS
WDTRST WDTEN
Bit 7 6 5 4 3 2 1 0
Symbol Function
PS2 Prescaler Bits for the Watchdog Timer. When all three bits are set to “0”, the watchdog timer has a nominal
PS1 period of 16 ms. When all three bits are set to “1”, the nominal period is 2048 ms.
PS0
DPS
Data Pointer Register Select. DPS = 0 selects the first bank of Data Pointer Register, DP0, and DPS = 1
selects the second bank, DP1
WDTRST Watchdog Timer Reset. Each time this bit is set to “1” by user software, a pulse is generated to reset the
watchdog timer. The WDTRST bit is then automatically reset to “0” in the next instruction cycle. The
WDTRST bit is Write-Only.
WDTEN Watchdog Timer Enable Bit. WDTEN = 1 enables the watchdog timer and WDTEN = 0 disables the
watchdog timer.
4-255

7페이지


구       성 총 30 페이지수
다운로드[ AT89LS53-12AI.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
AT89LS53-12AC

8-Bit Microcontroller with 12K Bytes Flash

ATMEL Corporation
ATMEL Corporation
AT89LS53-12AI

8-Bit Microcontroller with 12K Bytes Flash

ATMEL Corporation
ATMEL Corporation

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵