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AT89LV51-12PI 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT89LV51-12PI은 전자 산업 및 응용 분야에서
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부품번호 AT89LV51-12PI 기능
기능 8-Bit Microcontroller with 4K Bytes Flash
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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AT89LV51-12PI 데이터시트, 핀배열, 회로
Features
Compatible with MCS-51™ Products
4K Bytes of Reprogrammable Flash Memory
– Endurance: 1,000 Write/Erase Cycles
2.7V to 6V Operating Range
Fully Static Operation: 0 Hz to 12 MHz
Three-Level Program Memory Lock
128 x 8-Bit Internal RAM
32 Programmable I/O Lines
Two 16-Bit Timer/Counters
Six Interrupt Sources
Programmable Serial Channel
Low Power Idle and Power Down Modes
Description
The AT89LV51 is a low-voltage, high-performance CMOS 8-bit microcomputer with
4K bytes of Flash Programmable and Erasable Read Only Memory. The device is
manufactured using Atmel’s high density nonvolatile memory technology and is com-
patible with the industry standard MCS-51™ instruction set and pinout. The on-chip
Flash allows the program memory to be reprogrammed in-system or by a conven-
tional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash
on a monolithic chip, the Atmel AT89LV51 is a powerful microcomputer which pro-
vides a highly flexible and cost effective solution to many embedded control applica-
tions. The AT89LV51 operates at 2.7 volts up to 6.0 volts.
Pin Configurations
(continued)
PDIP
TQFP
INDEX
CORNER
P1.5
P1.6
P1.7
RST
(RXD) P3.0
NC
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
4 44 34 24 14 03 93 83 73 63 53 4
1 33
2 32
3 31
4 30
5 29
6 28
7 27
8 26
9 25
10 24
11 23
1
21
31
1
4
51
61
71
1
8
9
2
0
2
12
2
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD) P3.0
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
X TA L 2
X TA L 1
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VCC
39 P0.0 (AD0)
38 P0.1 (AD1)
37 P0.2 (AD2)
36 P0.3 (AD3)
35 P0.4 (AD4)
34 P0.5 (AD5)
33 P0.6 (AD6)
32 P0.7 (AD7)
31 EA/VPP
30 ALE/PROG
29 PSEN
28 P2.7 (A15)
27 P2.6 (A14)
26 P2.5 (A13)
25 P2.4 (A12)
24 P2.3 (A11)
23 P2.2 (A10)
22 P2.1 (A9)
21 P2.0 (A8)
PLCC
INDEX
CORNER
(RXD)
(TXD)
(INT0)
(INT1)
(T0)
(T1)
P1.5
P1.6
P1.7
RST
P3.0
NC
P3.1
P3.2
P3.3
P3.4
P3.5
6 4 2 44 42 40
7 5 3 1 43 4139
8 38
9 37
10 36
11 35
12 34
13 33
14 32
15 31
16 30
11781 92 02 12 22 32 42 52 62 72289
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA/VPP
NC
ALE/PROG
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
8-Bit
Microcontroller
with 4K Bytes
Flash
AT89LV51
0303D-D–12/97
4-45




AT89LV51-12PI pdf, 반도체, 판매, 대치품
EA/VPP
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external pro-
gram memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset.
EA should be strapped to VCC for internal program execu-
tions.
This pin also receives the 12-volt programming enable volt-
age (VPP) during Flash programming, when 12-volt pro-
gramming is selected.
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Table 1. AT89LV51 SFR Map and Reset Values
0F8H
Special Function Registers
A map of the on-chip memory area called the Special Func-
tion Register (SFR) space is shown in Table 1.
Note that not all of the addresses are occupied, and unoc-
cupied addresses may not be implemented on the chip.
Read accesses to these addresses will in general return
random data, and write accesses will have an indetermi-
nate effect.
User software should not write 1s to these unlisted loca-
tions, since they may be used in future products to invoke
new features. In that case, the reset or inactive values of
the new bits will always be 0.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89LV51 operate the same
way as Timer 0 and Timer 1 in the AT89C51.
0FFH
0F0H
0E8H
B
00000000
0F7H
0EFH
0E0H
0D8H
ACC
00000000
0E7H
0DFH
0D0H
0C8H
0C0H
PSW
00000000
T2CON
00000000
T2MOD
XXXXXX00
RCAP2L
00000000
RCAP2H
00000000
TL2
00000000
TH2
00000000
0D7H
0CFH
0C7H
0B8H
0B0H
0A8H
0A0H
98H
90H
88H
80H
IP
XX000000
P3
11111111
IE
0X000000
P2
11111111
SCON
00000000
P1
11111111
TCON
00000000
P0
11111111
SBUF
XXXXXXXX
TMOD
00000000
SP
00000111
TL0
00000000
DPL
00000000
TL1
00000000
DPH
00000000
TH0
00000000
TH1
00000000
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
PCON
87H
0XXX0000
4-48 AT89LV51

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AT89LV51-12PI 전자부품, 판매, 대치품
AT89LV51
Programming Interface
Every code byte in the Flash array can be written and the
entire array can be erased by using the appropriate combi-
nation of control signals. The write operation cycle is self-
timed and once initiated, will automatically time itself to
completion.
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
Flash Programming Modes
Mode
Write Code Data
RST
H
PSEN
L
ALE/PROG
EA/VPP
12V
P2.6
L
P2.7
H
P3.6
H
P3.7
H
Read Code Data
Write Lock
Bit - 1
H
H
L
L
H HL LHH
12V H H H H
Bit - 2
H
L
12V H H L L
Bit - 3
H
L
12V H L H L
Chip Erase
HL
(1) 12V
H
L
Read Signature Byte
HL
Note: 1. Chip Erase requires a 10-ms PROG pulse.
H
Figure 3. Programming the Flash
ADDR. A0 - A7
OOOOH/OFFFH
A8 - A11
AT89LV51
P1 VCC
P2.0 - P2.3 P0
P2.6
+5V
PGM
DATA
SEE FLASH
PROGRAMMING
MODES TABLE
P2.7
P3.6
P3.7
ALE
PROG
XTAL2
EA
VIH/VPP
HL L
Figure 4. Verifying the Flash
3-12 MHz
L
L
CC
L
L
XTAL1
GND
RST
PSEN
VIH
4-51

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