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AT90LS2343-4PI 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT90LS2343-4PI은 전자 산업 및 응용 분야에서
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부품번호 AT90LS2343-4PI 기능
기능 8-Bit Microcontroller with 2K Bytes of In-System Programmable Flash
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AT90LS2343-4PI 데이터시트, 핀배열, 회로
Features
Utilizes the AVR® RISC Architecture
AVR – High-performance and Low-power RISC Architecture
– 118 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General-purpose Working Registers
– Up to 10 MIPS Throughput at 10 MHz
Data and Nonvolatile Program Memory
– 2K Bytes of In-System Programmable Flash
Endurance: 1,000 Write/Erase Cycles
– 128 Bytes Internal RAM
– 128 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
– Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
www.DataSheet4UO.ncoem8-bit Timer/Counter with Separate Prescaler
– Programmable Watchdog Timer with On-chip Oscillator
– SPI Serial Interface for In-System Programming
Special Microcontroller Features
– Low-power Idle and Power-down Modes
– External and Internal Interrupt Sources
– Power-on Reset Circuit
– Selectable On-chip RC Oscillator
Specifications
– Low-power, High-speed CMOS Process Technology
– Fully Static Operation
Power Consumption at 4 MHz, 3V, 25°C
– Active: 2.4 mA
– Idle Mode: 0.5 mA
– Power-down Mode: <1 µA
I/O and Packages
– Three Programmable I/O Lines for AT90S/LS2323
– Five Programmable I/O Lines for AT90S/LS2343
– 8-pin PDIP and SOIC
Operating Voltages
– 4.0 - 6.0V for AT90S2323/AT90S2343
– 2.7 - 6.0V for AT90LS2323/AT90LS2343
Speed Grades
– 0 - 10 MHz for AT90S2323/AT90S2343-10
– 0 - 4 MHz for AT90LS2323/AT90LS2343-4
– 0 - 1 MHz for AT90LS2343-1
8-bit
Microcontroller
with 2K Bytes of
In-System
Programmable
Flash
AT90S2323
AT90LS2323
AT90S2343
AT90LS2343
Pin Configuration
PDIP/SOIC
RESET
(CLOCK) PB3
PB4
GND
1
2
3
4
8 VCC
RESET 1
7 PB2 (SCK/T0)
XTAL1 2
6 PB1 (MISO/INT0) XTAL2 3
5 PB0 (MOSI)
GND 4
8 VCC
7 PB2 (SCK/T0)
6 PB1 (MISO/INT0)
5 PB0 (MOSI)
AT90S/LS2343
AT90S/LS2323
Rev. 1004D09/01
1




AT90LS2343-4PI pdf, 반도체, 판매, 대치품
Comparison between
AT90S/LS2323 and
AT90S/LS2343
www.DataSheet4U.com
Pin Descriptions
AT90S/LS2323
VCC
GND
Port B (PB2..PB0)
RESET
XTAL1
XTAL2
chip, the Atmel AT90S2323/2343 is a powerful microcontroller that provides a highly
flexible and cost-effective solution to many embedded control applications.
The AT90S2323/2343 AVR is supported with a full suite of program and system devel-
opment tools including: C compilers, macro assemblers, program debugger/simulators,
in-circuit emulators and evaluation kits.
The AT90S/LS2323 is intended for use with external quartz crystal or ceramic resonator
as the clock source. The start-up time is fuse-selectable as either 1 ms (suitable for
ceramic resonator) or 16 ms (suitable for crystal). The device has three I/O pins.
The AT90S/LS2343 is intended for use with either an external clock source or the inter-
nal RC oscillator as clock source. The device has five I/O pins.
Table 1 summarizes the differences in features of the two devices.
Table 1. Feature Difference Summary
Part AT90S/LS2323
On-chip Oscillator Amplifier
yes
Internal RC Clock
no
PB3 available as I/O pin
never
PB4 available as I/O pin
never
Start-up time
1 ms/16 ms
AT90S/LS2343
no
yes
internal clock mode
always
16 µs fixed
Supply voltage pin.
Ground pin.
Port B is a 3-bit bi-directional I/O port with internal pull-up resistors. The Port B output
buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low, will source
current if the pull-up resistors are activated.
Port B also serves the functions of various special features.
Port pins can provide internal pull-up resistors (selected for each bit). The Port B pins
are tri-stated when a reset condition becomes active.
Reset input. An external reset is generated by a low level on the RESET pin. Reset
pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.
4 AT90S/LS2323/2343
1004D09/01

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AT90LS2343-4PI 전자부품, 판매, 대치품
Architectural
Overview
www.DataSheet4U.com
1004D09/01
AT90S/LS2323/2343
The fast-access register file concept contains 32 x 8-bit general-purpose working regis-
ters with a single clock cycle access time. This means that during one single clock cycle,
one ALU (Arithmetic Logic Unit) operation is executed. Two operands are output from
the register file, the operation is executed and the result is stored back in the register file
in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for
Data Space addressing, enabling efficient address calculations. One of the three
address pointers is also used as the address pointer for the constant table look-up func-
tion. These added function registers are the 16-bit X-, Y-, and Z-register.
Figure 5. The AT90S2323/2343 AVR RISC Architecture
1K x 16
Program
Flash
Instruction
Register
Instruction
Decoder
Control Lines
Program
Counter
Data Bus 8-bit
Status
and Test
32 x 8
General
Purpose
Registers
ALU
Control
Registers
Interrupt
Unit
SPI
Unit
8-bit
Timer/Counter
Watchdog
Timer
128 x 8
Data
SRAM
I/O Lines
128 x 8
EEPROM
The ALU supports arithmetic and logic functions between registers or between a con-
stant and a register. Single register operations are also executed in the ALU. Figure 5
shows the AT90S2323/2343 AVR RISC microcontroller architecture.
In addition to the register operation, the conventional memory addressing modes can be
used on the register file as well. This is enabled by the fact that the register file is
assigned the 32 lowermost Data Space addresses ($00 - $1F), allowing them to be
accessed as though they were ordinary memory locations.
The I/O memory space contains 64 addresses for CPU peripheral functions such as
Control Registers, Timer/Counters, A/D converters and other I/O functions. The I/O
memory can be accessed directly or as the Data Space locations following those of the
register file, $20 - $5F.
7

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