|
|
PDF AT90S8535-8AI Data sheet ( Hoja de datos )
| Número de pieza | AT90S8535-8AI | |
| Descripción | 8-Bit Microcontroller with 4K/8K Bytes In-System Programmable Flash | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AT90S8535-8AI (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
Features
• Utilizes the AVR ® Enhanced RISC Architecture
• AVR - High Performance and Low Power RISC Architecture
• 118 Powerful Instructions - Most Single Clock Cycle Execution
• 8K bytes of In-System Programmable Flash AT90S/LS8535
4K bytes of In-System Programmable Flash AT90S/LS4434
– SPI Serial Interface for In-System Programming
– Endurance: 1,000 Write/Erase Cycles
• 512 bytes EEPROM AT90S/LS8535
256 bytes EEPROM AT90S/LS4434
– Endurance: 100,000 Write/Erase Cycles
• 512 bytes Internal SRAM AT90S/LS8535
256 bytes Internal SRAM AT90S/LS4434
• 8-Channel, 10-Bit ADC
• 32 x 8 General Purpose Working Registers
• 32 Programmable I/O Lines
• Programmable Serial UART
• VCC: 4.0 - 6.0V AT90S4434/AT90S8535
• VCC: 2.7 - 6.0V AT90LS4434/AT90LS8535
• Speed Grades:
0 - 8 MHz AT90S4434/AT90S8535,
0 - 4 MHz (AT90LS4434/AT90LS8535
• Power-On Reset Circuit
• Up to 8 MIPS Throughput at 8 MHz
• RTC with Separate Oscillator and Counter Mode
• Two 8-Bit Timer/Counters with Separate Prescaler and Compare Mode
• One 16-Bit Timer/Counter with Separate Prescaler and Compare and Capture Modes
• 3 PWM channels
• External and Internal Interrupt Sources
• Programmable Watchdog Timer with On-Chip Oscillator
• On-Chip Analog Comparator
• Three Sleep Modes: Idle, Power Save, and Power Down
• Programming Lock for Software Security
Description
The AT90S4434/8535 is a low-power CMOS 8-bit microcontroller based on the AVR®
enhanced RISC architecture. By executing powerful instructions in a single clock
cycle, the AT90S4434/8535 achieves throughputs approaching 1 MIPS per MHz
allowing the system designer to optimize power consumption versus processing
speed.
(continued)
Pin Configurations
8-Bit
Microcontroller
with 4K/8K
Bytes In-System
Programmable
Flash
AT90S4434
AT90LS4434
AT90S8535
AT90LS8535
Advance
Information
Rev. 1041AS–05/98
Note: This is a summary document. For the complete 80 page
document, please visit our website at www.atmel.com
[email protected] and request literature #1041A.
or
e-mail
a1t
1 page  
AT90S/LS4434 and AT90S/LS8535
The ALU supports arithmetic and logic functions between
registers or between a constant and a register. Single reg-
ister operations are also executed in the ALU. Figure 3
shows the AT90S4434/8535 AVR Enhanced RISC micro-
controller architecture.
In addition to the register operation, the conventional mem-
ory addressing modes can be used on the register file as
well. This is enabled by the fact that the register file is
assigned the 32 lowermost Data Space addresses ($00 -
$1F), allowing them to be accessed as though they were
ordinary memory locations.
The I/O memory space contains 64 addresses for CPU
peripheral functions as Control Registers, Timer/Counters,
A/D-converters, and other I/O functions. The I/O Memory
can be accessed directly, or as the Data Space locations
following those of the register file, $20 - $5F.
The AVR uses a Harvard architecture concept - with sepa-
rate memories and buses for program and data. The pro-
gram memory is executed with a single level pipelining.
While one instruction is being executed, the next instruction
is pre-fetched from the program memory. This concept
enables instructions to be executed in every clock cycle.
The program memory is in-system downloadable Flash
memory.
With the relative jump and call instructions, the whole
2K/4K address space is directly accessed. Most AVR
instructions have a single 16-bit word format. Every pro-
gram memory address contains a 16- or 32-bit instruction.
During interrupts and subroutine calls, the return address
program counter (PC) is stored on the stack. The stack is
effectively allocated in the general data SRAM, and conse-
quently the stack size is only limited by the total SRAM size
and the usage of the SRAM. All user programs must initial-
ize the SP in the reset routine (before subroutines or inter-
rupts are executed). The 9-bit stack pointer SP is read/write
accessible in the I/O space.
The 256/512 bytes data SRAM can be easily accessed
through the five different addressing modes supported in
the AVR architecture.
The memory spaces in the AVR architecture are all linear
and regular memory maps.
Figure 4. Memory Maps
Program Memory
Data Memory
Data Memory
$000
32 Gen. Purpose $0000
Working Registers $001F
$0020
$0000
Program Flash
(2K/4K x 16)
64 I/O Registers
$005F
$0060
EEPROM
(256/512 x 8)
Internal SRAM
(256/512 x 8)
$1F/$FF
$015F/$025F
$7FF/$FFF
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet AT90S8535-8AI.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AT90S8535-8AC | 8-Bit Microcontroller with 4K/8K Bytes In-System Programmable Flash | ATMEL Corporation |
| AT90S8535-8AI | 8-Bit Microcontroller with 4K/8K Bytes In-System Programmable Flash | ATMEL Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |