|
|
PDF AT91F40816 Data sheet ( Hoja de datos )
| Número de pieza | AT91F40816 | |
| Descripción | ARM Thumb Microcontrollers | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AT91F40816 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
|
No Preview Available !
Features
• Incorporates the ARM7TDMI® ARM® Thumb® Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-circuit Emulation)
• 8K Bytes On-chip SRAM
– 32-bit Data Bus, Single-clock Cycle Access
• 1M Words 16-bit Flash Memory (16 Mbits)
– Single Voltage Read/Write
– Sector Erase Architecture
– Dual-plane Organization Allows Concurrent Read and Program/Erase
– Erase Suspend Capability
– Low-power Operation
– Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection
– Reset Input for Device Initialization
– Sector Program Unlock Command
– Factory-programmed AT91 Flash Uploader Software
• Fully-programmable External Bus Interface (EBI)
– Maximum External Address Space of 64M Bytes
– 8 Chip Selects, Software-programmable 8/16-bit External Data Bus
• 8-level Priority, Individually Maskable, Vectored Interrupt Controller
– 4 External Interrupts, Including a High-priority Low-latency Interrupt Request
• 32 Programmable I/O Lines
• 3-channel 16-bit Timer/Counter
– 3 External Clock Inputs
– 2 Multi-purpose I/O Pins per Channel
• 2 USARTs
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
• Programmable Watchdog Timer
• Advanced Power-saving Features
– CPU and Peripherals Can Be Deactivated Individually
• Fully Static Operation:
– 0 Hz to 40 MHz Internal Frequency Range at 3.0V, 85°C
• 2.7V to 3.6V Operating Range
• -40°C to 85°C Temperature Range
• Available in a 120-ball BGA Package
AT91 ARM®
Thumb®
Microcontrollers
AT91F40816
Description
The AT91F40816 is a member of the Atmel AT91 16/32-bit microcontroller family,
which is based on the ARM7TDMI processor core. The processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption. In addition, a large number of internally banked registers result in
very fast exception handling, making the device ideal for real-time control applications.
The eight-level priority-vectored interrupt controller, together with the Peripheral Data
Controller, significantly enhance real-time device performance.
By combining the microcontroller, featuring on-chip SRAM and a wide range of periph-
eral functions, with 16 Mbits of Flash memory in a single compact 120-ball BGA
package, the Atmel AT91F40816 provides a powerful, flexible and cost-effective solu-
tion to many compute-intensive embedded control applications and offers significant
board size reductions.
The Flash memory may be programmed via the JTAG/ICE interface or the factory-pro-
grammed Flash Uploader using a single device supply, making the AT91F40816 ideal
for in-system programmable applications.
1348D–ATARM–03/04
1 page  
Block Diagram
Figure 2. AT91F40816
AT91F40816
1348D–ATARM–03/04
5
5 Page 
Abort Control
External Bus Interface
Flash Memory
1348D–ATARM–03/04
AT91F40816
Interface by writing one in RCB of EBI_RCR (Remap Control Register). Performing a
remap command is mandatory if access to the other external devices (connected to
chip-selects 1 to 7) is required. The remap operation can only be changed back by an
internal reset or an NRST assertion.
The abort signal providing a Data Abort or a Prefetch Abort exception to the ARM7TDMI
is asserted when accessing an undefined address in the EBI address space.
No abort is generated when reading the internal memory or by accessing the internal
peripherals, whether the address is defined or not.
The External Bus Interface handles the accesses between addresses 0x0040 0000 and
0xFFC0 0000. It generates the signals that control access to the external devices, and
can be configured from eight 1-Mbyte banks up to four 16-Mbyte banks. It supports byte,
half-word and word aligned accesses.
For each of these banks, the user can program:
• Number of wait states
• Number of data float times (wait time after the access is finished to prevent any bus
contention in case the device is too long in releasing the bus)
• Data bus-width (8-bit or 16-bit).
• With a 16-bit wide data bus, the user can program the EBI to control one 16-bit
device (Byte Access Select mode) or two 8-bit devices in parallel that emulate a 16-
bit memory (Byte Write Access Mode).
The External Bus Interface features also the Early Read Protocol, configurable for all the
devices, that significantly reduces access time requirements on an external device in
the case of single-clock cycle access.
In the AT91F40816, the External Bus Interface connects internally to the Flash memory.
The 16M-bit Flash memory is organized as 1,048,576 16-bit words. The Flash memory
is addressed as 16-bit words via the EBI. It uses address lines A1 to A20. Address line
A20 must not be reprogrammed as an I/O pin or as a chip select, as it is the most signif-
icant bit of the Flash memory address.
The address, data and control signals, except the Flash memory enable, are internally
interconnected. The user should connect the Flash memory enable (NCSF) to one of
the active-low chip selects on the EBI. NCS0 must be used if the Flash memory is to be
the boot memory. In addition, if the Flash memory is to be used as boot memory, the
BMS input must be pulled down externally in order for the processor to perform correct
16-bit fetches after reset.
During boot, the EBI must be configured with correct number of standard wait states.
For example, five standard wait states are required when the microcontroller is running
at 40 MHz.
The user must ensure that all VDD and all GND pins are connected to their respective
supplies by the shortest route. The Flash memory powers-on in the read mode. Com-
mand sequences are used to place the device in other operating modes, such as
program and erase.
A separate Flash memory reset input pin (NRSTF) is provided for maximum flexibility,
enabling the reset operation to adapt to the application. When this input is at a logic
high-level, the memory is in its standard operating mode; a low-level on this input halts
the current memory operation and puts its outputs in a high impedance state.
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet AT91F40816.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AT91F40816 | ARM Thumb Microcontrollers | ATMEL Corporation |
| AT91F40816-33CI | ARM Thumb Microcontrollers | ATMEL Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |