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PDF AT91M55800A Data sheet ( Hoja de datos )
| Número de pieza | AT91M55800A | |
| Descripción | ARM Thumb Microcontrollers | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Utilizes the ARM7TDMI™ ARM Thumb Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-Circuit Emulation)
• 8K Bytes Internal SRAM
• Fully-programmable External Bus Interface (EBI)
– Maximum External Address Space of 128M Bytes
– Eight Chip Selects
– Software Programmable 8/16-bit External Databus
• 8-level Priority, Individually Maskable, Vectored Interrupt Controller
– Seven External Interrupts, Including a High-priority, Low-latency Interrupt Request
• Fifty-eight Programmable I/O Lines
www.Data•Sh6e-ecth4Ua.ncnomel 16-bit Timer/Counter
– Six External Clock Inputs and Two Multi-purpose I/O Pins per Channel
• Three USARTs
• Master/Slave SPI Interface
– 8-bit to 16-bit Programmable Data Length
– Four External Slave Chip Selects
• Programmable Watchdog Timer
• 8-channel 10-bit ADC
• 2-channel 10-bit DAC
• Clock Generator with On-chip Main Oscillator and PLL for Multiplication
– 3 to 20 MHz Frequency Range Main Oscillator
• Real-time Clock with On-chip 32 kHz Oscillator
– Battery Backup Operation and External Alarm
• 8-channel Peripheral Data Controller for USARTs and SPIs
• Advanced Power Management Controller (APMC)
– Normal, Wait, Slow, Standby and Power-down modes
• IEEE 1149.1 JTAG Boundary-scan on all Digital Pins
• Fully Static Operation: 0 Hz to 33 MHz
• 2.7V to 3.6V Core Operating Range
• 2.7V to 5.5V I/O Operating Range
• 2.7V to 3.6V Analog Operating Range
• 1.8V to 3.6V Backup Battery Operating Range
• 2.7V to 3.6V Oscillator and PLL Operating Range
• -40°C to +85°C Temperature Range
• Available in a 176-lead TQFP or 176-ball BGA Package
AT91
ARM® Thumb®
Microcontrollers
AT91M55800A
Description
The AT91M55800A is a member of the Atmel AT91 16/32-bit microcontroller family,
which is based on the ARM7TDMI processor core. This processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption. In addition, a large number of internally banked registers result in
very fast exception handling, making the device ideal for real-time control applications.
The fully programmable External Bus Interface provides a direct connection to off-chip
memory in as fast as one clock cycle for a read or write operation. An eight-level prior-
ity vectored interrupt controller in conjunction with the peripheral data controller
significantly improve the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By combin-
ing the ARM7TDMI processor core with an on-chip SRAM, a wide range of peripheral
functions, analog interfaces and low-power oscillators on a monolithic chip, the Atmel
AT91M55800A is a powerful microcontroller that provides a highly-flexible and cost-
effective solution to many ultra low-power applications.
Rev. 1745B–ATARM–04/02
1
1 page  
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Figure 1. 176-lead TQFP Pinout
132
133
AT91M55800A
89
88
176
1
45
44
Figure 2. 176-ball BGA Pinout
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
1745B–ATARM–04/02
5
5 Page 
AT91M55800A
Product Overview
Power Supplies
www.DataSheet4U.com
Input/Output
Considerations
The AT91M55800A has 5 kinds of power supply pins:
• VDDCORE pins, which power the chip core
• VDDIO pins, which power the I/O Lines
• VDDPLL pins, which power the oscillator and PLL cells
• VDDA pins, which power the analog peripherals ADC and DAC
• VDDBU pins, which power the RTC, the 32768 Hz oscillator and the Shut-down
Logic of the APMC
VDDIO and VDDCORE are separated to permit the I/O lines to be powered with 5V,
thus resulting in full TTL compliance.
The following ground pins are provided:
• GND for both VDDCORE and VDDIO
• GNDPLL for VDDPLL
• GNDA for VDDA
• GNDBU for VDDBU
All of these ground pins must be connected to the same voltage (generally the board
electric ground) with wires as short as possible. GNDPLL, GNDA and GNDBU are pro-
vided separately in order to allow the user to add a decoupling capacitor directly
between the power and ground pads. In the same way, the PLL filter resistor and capac-
itors must be connected to the device and to GNDBU with wires as short as possible.
Also, the main oscillator crystal and the 32768 Hz crystal external load capacitances
must be connected respectively to GNDPLL and to GNDBU with wires as short as
possible.
The main constraints applying to the different voltages of the device are:
• VDDBU must be lower than or equal to VDDCORE
• VDDA must be higher than or equal to VDDCORE
• VDDCORE must be lower than or equal to VDDIO
The nominal power combinations supported by the AT91M55800A are described in the
following table:
Table 3. Nominal Power Combinations
VDDIO VDDCORE VDDA
VDDPLL
VDDBU
Maximum Operating
Frequency
3V 3V 3V 3V 3V
33 MHz
3.3V
3.3V
3.3V
3.3V
3.3V
33 MHz
5V
3.3V
3.3V
3.3V
3.3V
33 MHz
After the reset, the peripheral I/Os are initialized as inputs to provide the user with maxi-
mum flexibility. It is recommended that in any application phase, the inputs to the
AT91M55800A microcontroller be held at valid logic levels to minimize the power
consumption.
1745B–ATARM–04/02
11
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| PDF Descargar | [ Datasheet AT91M55800A.PDF ] | |
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