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AT43310 데이터시트 PDF




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부품번호 AT43310 기능
기능 USB Hub
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AT43310 데이터시트, 핀배열, 회로
AT43310
Features
Bus Powered Hub Controller
Full Compliance with USB Spec Rev 1
Full Speed USB Host Interface
Four Downstream Ports
Downstream Support for Full Speed and Low Speed Transfer Rates
Continual Monitoring of Port by System Host
Individual Port Power Control
USB Connection Status Indicators
6 MHz Oscillator with On-Chip PLL
Description
The AT43310 is a fully compliant USB hub chip with 5 ports, one upstream port and
four full/low-speed downstream ports. The AT43310 can be used as a stand alone or
can provide a simple and quick method of adding USB ports to an existing device.
As a repeater, the AT43310 provides upstream connectivity between the selected
function and the host. Connectivity involves setting up and tearing down connections,
handling bus faults, recovering from bus faults and detecting downstream device con-
nections and disconnections.
The AT43310 may also act as a hub controller managing the hub operations and
recording the status of the hub, bus transactions, and downstream ports. In this mode,
the AT43310 tracks and generates the bus enumeration, provides configuration infor-
mation to the host, provides individual port status to the host, and controls the port
operation based on host commands.
USB Hub
AT43310
Pin Configurations
SOIC/DIP/Cerdip
PWR2
PWR3
PWR4
VCC5
VSS
OSC1
OSC2
LFT
VCCA
OVL4
OVL3
OVL2
OVL1
VREF
GND
STAT4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 PWR1
31 DP4
30 DM4
29 DP3
28 DM3
27 GND
26 DP2
25 DM2
24 VCC3
23 DP1
22 XDM1
21 DP0
20 DM0
19 STAT1
18 STAT2
17 STAT3
Rev. 0901A-A–01/98
1




AT43310 pdf, 반도체, 판매, 대치품
USB Hub Description
Hub Repeater
The hub repeater is responsible for port connectivity setup
and tear-down. The repeater also supports exception han-
dling such as bus fault detection and recovery, and con-
nect/disconnect detection.
When a SOP token is detected on the upstream port,
Port0, the AT43310 determines the speed of the transfer.
A USB hub must not propagate a full speed transfer to a
low speed port due to the possible misinterpretation of the
data. The AT43310 will propagate the packet to all enabled
downstream ports.
Note: See USB Specification for further detail on bus
states
The AT43310 supports downstream data signaling at both
1.5 Mbps and 12 Mbps. Devices attached to the down-
stream ports are either full speed or low speed depending
on which data line (DP or DM) is pulled high. If a port is
enumerated as low speed, the output buffers operate at a
slew rate between 75 ns and 300 ns. The AT43310 will not
propagate any traffic to that port unless it is prefaced with a
preamble PID. Low speed data following the preamble PID
is propagated to both low and full speed devices. The
AT43310 will enable low speed drivers within four full-
speed bit times of the last bit of a preamble PID, and will
disable the drivers at the end of an EOP. The upstream
traffic from any port to the host is propagated by Port0
using the full speed 4-20 ns slew rate drivers.
All ports are independently driven and monitored on the DP
and DM pins. The AT43310 detects or generates the ‘J’,
‘K’, and SE0 bus signaling states. Each hub port has sin-
gle-ended and differential receivers on its DP and DM lines.
The ports’ I/O buffers comply to the voltage levels and drive
requirements as specified in the USB Specifications Revi-
sion 1.0.
The Hub Repeater implements a frame timer that is timed
by the 12 MHz USB clock and is reset every time an SOF
token is received from the Host.
Hub Controller
The hub controller manages and records the operations of
the AT43310. During enumeration, the controller sends the
host the configuration information. The controller also
allows the host to retrieve the status of the downstream
ports, and power the downstream ports. The controller
applies power to the downstream ports on a per port basis.
After configuration, the controller will enable the power to a
downstream port upon a SetPortPower command by the
host. The controller supports two endpoints and a Control
Status register.
Serial Interface Engine
The Serial Interface Engine (SIE) converts data between
the serialized USB format and usable data for the controller
and repeater. To carry out these tasks, the SIE is able to
detect or generate USB signaling. Once a valid operation is
detected, the SIE translates the data depending on the
operation.
During a reception, the SIE will use the high speed clock
supplied by the PLL to help synchronize and separate the
synchronization information from the data. The data must
be decoded before the SIE may supply the packet ID to the
controller and repeater.
The USB protocol uses Cyclical Redundancy Check
(CRC), Non Return to Zero Invert (NRZI) data encoding
and bit stuffing to improve the reliability of data transfers.
The SIE must decode the NRZI and strip off the stuffed bit
to determine the actual data. The CRC information will be
used by the SIE to determine if a transmission error has
occurred. If an error has occurred, the SIE will correct the
data using CRC algorithms.
Control Status Register
Bit Function
0 Hub configuration status
1 Hub remote wakeup status
2 Endpoint0 STALL status
3 Endpoint1 STALL status
Value
0
1
0
1
0
1
0
1
4 AT43310
Description
Set to 0 or 1 by a Set_Configuration Request
Hub is not currently configured
Hub is currently configured
Set to 0 or 1 by ClearFeature or SetFeature request
Default value is 0
Hub is currently not enabled to request remote wakeup
Hub is currently enables to request remote wakeup
Endpoint0 is stalled
Endpoint0 is stalled
Endpoint1 is not stalled
Endpoint1 is stalled

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AT43310 전자부품, 판매, 대치품
AT43310
pins OSC1 and OSC2 are recommended. The values for
these capacitors depends on the crystal and the layout of
the board, but typically are 33 pF at OSC1 and 47 pF at
OSC2. If the crystal used cannot tolerate the drive levels of
the oscillator, a series resistor between OSC2 and the crys-
tal pin may be used.
Figure 2 shows how to properly connect the oscillator for
the AT43310. Ceramic resonators are not recommended
due to the frequency stability required by the USB specifi-
cation (0.25%).
If desired, the clock can be externally sourced. To clock
externally, connect the clock source to the OSC1 pin, while
leaving the OSC2 pin floating. The switching level at the
OSC1 pin can be as low as 0.47V (see electrical specifica-
tions). A CMOS device is required to drive this pin to main-
tain good noise margins at the low switching level.
For proper operation of the PLL, see Figure 2-Ocscillator
and PLL Connection.
To provide the best operating condition for the AT43310,
careful consideration of the power supply connections are
Figure 2. Oscillator and PLL Connection
recommended. Use short, low impedance connections to
all power supply lines: VCC5, VCC3, VCCA, and VSS with 0.1
µF decoupling capacitors of high quality adjacent to the
device pins.
Descriptors
The Hub Controller supports the following standard USB
descriptors: Device, Configuration, Interface, and Endpoint
Descriptors, as well as the class specific Hub Descriptor.
All the required Standard Requests and Hub Class-Specific
Requests are supported by the AT43310’s Hub Controller.
7

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