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PDF AT43USB355 Data sheet ( Hoja de datos )
| Número de pieza | AT43USB355 | |
| Descripción | Missed Watchdog Timer Reset | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• AVR® 8-bit RISC Microcontroller with 83 ns Instruction Cycle Time
• USB Hub with One Attached and Two External Ports
• USB Function with Three Programmable End-points
• 24 KB Program Memory, 1 KB Data SRAM
• 32 x 8 General-purpose Working Registers
• 27 Programmable I/O Port Pins
• 12-channel 10-bit ADC
• Master/Slave SPI Serial Interface
• One 8-bit Timer/Counter with Separate Pre-scaler
• One 16-bit Timer/Counter with Separate Pre-scaler and Two PWMs
• External and Internal Interrupt Sources
• Programmable Watchdog Timer
• 6 MHz Oscillator with On-chip PLL
• 5V Operation with On-chip 3.3V Power Supply
• 64-lead LQFP Package
Description
The Atmel AT43USB355 is an 8-bit microcontroller based on the AVR RISC architec-
ture. By executing powerful instructions in a single clock cycle, the AT43USB355
achieves throughputs approaching 12 MIPS. The AVR core combines a rich instruc-
tion set with 32 general-purpose working registers. All 32 registers are directly
connected to the ALU allowing two independent registers to be accessed in one single
instruction executed in one clock cycle. The resulting architecture is more code effi-
cient while achieving throughputs up to ten times faster than conventional CISC
microcontrollers.
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Furthermore, the AT43USB355 features an on-chip 24-Kbyte program memory and
1-Kbyte of data memory. It is supported by a standard set of peripherals such as
timer/counter modules, watchdog timer and internal and external interrupt sources.
The major peripheral included in the AT43USB355 is a full-speed USB 2.0 Hub with
an embedded function and a 12-channel Analog-to-Digital Converter (ADC) for use in
applications such as game controllers.
Full-speed
USB
Microcontroller
with Embedded
Hub, ADC and
PWM
AT43USB355
2603G–USB–04/06
1
1 page  
AT43USB355
Signal Description (Continued)
Name
Type
PD[0:7]
Bi-directional
PF[1:3]
Bi-directional
SSN/NC
ADC[0:11]
AREF
TEST
RESETN
Output
Input
Input
Input
Input
Function
Port D[0:7] – Bi-directional I/O ports with 2 mA drive strength and a programmable
pull-up resistor. PortD[2,3,5,6] have dual functions as shown below:
Port Pin
Alternate Function
PD2 INT0, External Interrupt 0
PD3 INT1, External Interrupt 1
PD5 OC1A Timer/Counter1 Output Compare A
PD6 OC1B Timer/Counter1 Output Compare B
Port F[1:3] – Bi-directional 3-bit I/O port with 2 mA drive strength and a
programmable pull-up resistor. In the AT43USB355E, PF[1:3] pins have dual
functions as the interface pins to the serial EEPROM. After program memory
downloading is complete, PF3 has a third function as Timer/Counter1 Input
Capture, ICP.
Port Pin
Alternate Function
PF1 SCK, SPI Master Clock Out
PF2 MOSI, SPI Slave Data Input
PF3 MISO, SPI Slave Data Out. ICP after download complete
Slave Select – In the AT43USB355E, this pin enables the external serial memory.
In the AT43USB355M, this pin has no function and can be left floating or connected
to VCEXT.
ADC Input[0:11] – 12-bit input pins for the ADC.
Analog Reference – Input for the ADC.
Test Pin – This pin should be tied to ground.
Reset – Active Low.
2603G–USB–04/06
5
5 Page 
SRAM Data
Memory
AT43USB355
Figure 5. READ Timing
SSN
SCK
0 1 2 3 4 5 6 7 8 9 10 11 20 21 22 23 24 25 26 27 28 29 30
MOSI
INSTRUCTION
BYTE ADDRESS
15 14 13 ... 3 2 1 0
MISO
HIGH IMPEDANCE
DATA OUT
76543210
MSB
Table 3 summarizes how the AT43USB355 SRAM Memory is organized. The lower 1120 Data
Memory locations address the Register file, the I/O Memory and the internal data SRAM. The
first 96 locations address the Register File + I/O Memory, and the next 1024 locations address
the internal data SRAM. The five different addressing modes for the data memory cover:
Direct, Indirect with Displacement, Indirect, Indirect with Pre-decrement and Indirect with Post-
increment. In the register file, registers R26 to R31 feature the indirect addressing pointer reg-
isters. Direct addressing reaches the entire data space.
The Indirect with Displacement mode features 63 address locations that reach from the base
address given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented and incremented.
The 32 general-purpose working registers, 64 I/O registers and the 1024 bytes of internal data
SRAM in the AT43USB355 are all accessible through these addressing modes.
To manage the USB hardware, a special set of registers is assigned. These registers are
mapped to SRAM space between addresses $1F00 and 1FFF. Table 3 and Table 4 give an
overview of these registers.
2603G–USB–04/06
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AT43USB355.PDF ] | |
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