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PDF AT43USB370 Data sheet ( Hoja de datos )
| Número de pieza | AT43USB370 | |
| Descripción | USB 2.0 Full-Speed Host/Function Processor | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• USB 2.0 Full Speed Host/Function Processor
– Real-time Host/Function Switching Capability
– Internal USB and System Interface Controllers
– 32-bit Generic System Processor Interface with DMA
– Separate TX and RX Buffers for Host and Function Operations
– In-System Firmware Upgrade
• Autonomous USB Host Operation without System Processor Intervention
– Device Enumeration
– USB Protocol Management
– Bus Bandwidth Reclamation
– Status Handling
– Control, Bulk, Interrupt and Isochronous Transfers
– Supports Up to 7 USB Devices Concurrently
• Full-speed Function Controller
– 1 Bi-directional Control Endpoint
– 6 Programmable (Maximum Packet Size and Endpoint Type) Endpoints
– Control, Interrupt, Bulk and Isochronous Transfer Support
– Automatic Retry for Non-Isochronous Endpoints
• Integrated USB Firmware
– Easy-to-use, ANSI C Compliant API USB Device Driver Development
– Embedded, OS Agnostic USB Host Stack
– Embedded System Interface Controller Driver
– Embedded USB Hub Driver
• 6 MHz Operation
• 1.8 V and 3.3 V Operation
• 100-pin LQFP Package
USB 2.0
Full-Speed
Host/Function
Processor
AT43USB370
Description
Atmel's AT43USB370 is a USB 2.0 compliant, dual-role, full-speed Host/Function pro-
cessor designed specifically to enable point-to-point USB connectivity for embedded
devices. It features an integrated USB host stack, a system interface driver, on-chip
USB signaling hardware, 32-bit generic system processor interface with DMA support,
and on-the-fly host/function switching capability.
The on-chip USB hardware features a USB transceiver, a serial interface engine (SIE),
a SIE controller, and an SOF generation block. It supports the physical and data link
layer of the USB protocol whereas the USB transaction layer is implemented in
firmware.
In host mode, the integrated USB firmware consists of the Host USB Controller Driver
(HUSBCD) running on the USB Controller (USBC) and the Host System Interface
Controller Driver (HSICD) resident on the System Interface Controller (SIC). The
HUSBCD provides complete USB protocol management including device enumera-
tion, transaction management, scheduling and frame management, and bus
reclamation. The HSICD serves as an interface between the HUSBCD and applica-
tions resident on the external system processor. It handles all of the high-level data
flow management during a USB transaction. Together, the HUSBCD and the HSICD
deliver complete USB host operations autonomously, without the intervention of the
system processor.
Rev. 3340B–USB–12/03
1
1 page  
AT43USB370
Pin Description (Continued)
Pin Name
DP
Type
Bi-directional
Description
D+ (USB Line)
DM
RPD_EN
RPU_EN
Bi-directional
Output
Output
D- (USB Line)
Pull Down Enable
Pull Up Enable
RESET_N
TCK
TMS
TDI
Input
Input
Input
Input
RESET – Active Low
JTAG Clock
JTAG Mode Select
JTAG Serial Data IN
TDO
TRST_N
Output
Input
JTAG Serial Data OUT
JTAG Reset – Active Low
DCLK
RCV_DATA
SCAN_EN
NC
Output
Output
Input
–
Recovered SIE DPLL Clock
Recovered Serial Data
Scan Test Enable
Not Connected
D[31:0]
Bi-directional
System Data Bus
Block Diagram
Figure 2. AT43USB370 Hardware
USB Controller
(USBC)
D+
D-
Control & Status
Registers
System Interface
Controller (SIC)
Control
Address
Data
FIFOs
DMA
3340B–USB–12/03
5
5 Page 
AT43USB370
System
Processor
Interface
Register Set
The System Processor Interface register set is used by the AT43USB370 to interact with the
system processor. The same register set is used in both the host and the function modes
except where explicitly stated. All registers are 32-bit wide and require access on 4-bytes
boundaries.
Reading a register for which the external system processor does not have read access will
yield a zero value result. Writing to a register for which the external system processor does not
have write access has no effect. For detailed usage of the registers, please refer to the
AT43USB370 Software Development Guide.
Naming Convention
The following naming convention applies to the System Processor Interface Register Set.
• Three different fields in the register name are separated by underscores '_'
• The first field in the register name is a prefix indicating the Write access identification
literal:
– USBP indicates the register is always written by the AT43USB370 USB Processor
– SYSP indicates the register is always written by the system processor
• The second field in the register name indicates the functionality of the register
• The third field in the register name is a suffix 'REG' common to all the registers
Table 1. System Processor Interface Register Set
S.N.
Address
Host/Device Name
1 0x00
H/D SYSP_CMD_REG
2 0x04
H/D USBP_REQ_REG
3 0x08
H SYSP_CMDID_REG
4 0x0C
H/D USBP_CMDID_REG
5 0x10
H/D USBP_EXECMDID_REG
6 0x14
H/D USBP_CMDRESP_REG
7 0x18
H SYSP_DEVADDR_REG
8 0x1C
H USBP_DEVADDR_REG
9 0x20
H/D SYSP_EPADDR_REG
10 0x24
H USBP_EPADDR_REG
11 0x28
H SYSP_PKTTYPE_REG
12 0x2C
H USBP_CLASSCD_REG
13 0x30
H USBP_SCLASSCD_REG
14 0x34
H USBP_PRTLCD_REG
15 0x38
H USBP_VENDID_REG
16 0x3C
H USBP_PRODID_REG
17 0x40
H USBP_HUBADDR_REG
18 0x44
H USBP_PORTNUM_REG
19 0x48
H SYSP_PKTSIZE_REG
20 0x4C
H SYSP_RTYCNT_REG
21 0x50
H/D SYSP_XFRMODE_REG
Function
Command Register
Request Register
Command ID Register (System Processor)
Command ID Register (USB Processor)
Executed Command ID Register
Command Response Register
Device Address Register (System Processor)
Device Address Register (USB Processor)
Endpoint Address Register (System Processor)
Endpoint Address Register (USB Processor)
Packet Type Register
Class Code Register
Subclass Code Register
Protocol Code Register
Vendor ID Register
Product ID Register
Hub's Device Address Register
Hub's Port Number Register
Packet Size Register
Retry Count Register
Data Transfer Mode Register
3340B–USB–12/03
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AT43USB370.PDF ] | |
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