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AT45D161-JI 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT45D161-JI은 전자 산업 및 응용 분야에서
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부품번호 AT45D161-JI 기능
기능 16-Megabit 5-volt Only Serial DataFlash
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AT45D161-JI 데이터시트, 핀배열, 회로
Features
Single 4.5V - 5.5V Supply
Serial Interface Architecture
Page Program Operation
– Single Cycle Reprogram (Erase and Program)
– 4096 Pages (528 Bytes/Page) Main Memory
Optional Page and Block Erase Operations
Two 528-Byte SRAM Data Buffers – Allows Receiving of Data while Reprogramming of
Nonvolatile Memory
Internal Program and Control Timer
Fast Page Program Time – 7 ms Typical
120 µs Typical Page to Buffer Transfer Time
Low Power Dissipation
– 15 mA Active Read Current Typical
– 10 µA CMOS Standby Current Typical
15 MHz Max Clock Frequency
Hardware Data Protection Feature
Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
Description
The AT45D161 is a 5-volt only, serial interface Flash memory suitable for in-system
reprogramming. Its 17,301,504 bits of memory are organized as 4096 pages of 528
bytes each. In addition to the main memory, the AT45D161 also contains two SRAM
data buffers of 528 bytes each. The buffers allow receiving of data while a page in the
main memory is being reprogrammed. Unlike conventional Flash memories that are
Pin Configurations
(continued)
Pin Name Function
SOIC
CS
SCK
SI
SO
WP
RESET
RDY/BUSY
Chip Select
Serial Clock
Serial Input
Serial Output
Hardware Page
Write Protect Pin
Chip Reset
Ready/Busy
GND
NC
NC
CS
SCK
SI
SO
NC
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 NC
26 NC
25 WP
24 RESET
23 RDY/BUSY
22 NC
21 NC
20 NC
19 NC
18 NC
17 NC
16 NC
15 NC
PLCC
SCK
SI
SO
NC
NC
NC
NC
NC
NC
5
6
7
8
9
10
11
12
13
29 WP
28 RESET
27 RDY/BUSY
26 NC
25 NC
24 NC
23 NC
22 NC
21 NC
Note: PLCC package pins 16
and 17 are DON’T CONNECT
RDY/BUSY
RESET
WP
NC
NC
VCC
GND
NC
NC
NC
CS
SCK
SI
SO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TSOP Top View
Type 1
28 NC
27 NC
26 NC
25 NC
24 NC
23 NC
22 NC
21 NC
20 NC
19 NC
18 NC
17 NC
16 NC
15 NC
16-Megabit
5-volt Only
Serial
DataFlash
AT45D161
Preliminary
AT45DB161
Preliminary 16-
Megabit 2.7-volt
Only Serial
DataFlash
Rev. 1081A–06/98
1




AT45D161-JI pdf, 반도체, 판매, 대치품
high transition on the CS pin will terminate the read opera-
tion and tri-state the SO pin.
MAIN MEMORY PAGE TO BUFFER TRANSFER: A page
of data can be transferred from the main memory to either
buffer 1 or buffer 2. An 8-bit opcode, 53H for buffer 1 and
55H for buffer 2, is followed by the two reserved bits, 12
address bits (PA11-PA0) which specify the page in main
memory that is to be transferred, and 10 don’t care bits.
The CS pin must be low while toggling the SCK pin to load
the opcode, the address bits, and the don’t care bits from
the SI pin. The transfer of the page of data from the main
memory to the buffer will begin when the CS pin transitions
from a low to a high state. During the transfer of a page of
data (tXFR), the status register can be read to determine
whether the transfer has been completed or not.
MAIN MEMORY PAGE TO BUFFER COMPARE: A page of
data in main memory can be compared to the data in buffer
1 or buffer 2. An 8-bit opcode, 60H for buffer 1 and 61H for
buffer 2, is followed by 24 address bits consisting of the two
reserved bits, 12 address bits (PA11-PA0) which specify
the page in the main memory that is to be compared to the
buffer, and 10 don't care bits. The loading of the opcode
and the address bits is the same as described previously.
The CS pin must be low while toggling the SCK pin to load
the opcode, the address bits, and the don't care bits from
the SI pin. On the low to high transition of the CS pin, the
528 bytes in the selected main memory page will be com-
pared with the 528 bytes in buffer 1 or buffer 2. During this
time (tXFR), the status register will indicate that the part is
busy. On completion of the compare operation, bit 6 of the
status register is updated with the result of the compare.
Program
BUFFER WRITE: Data can be shifted in from the SI pin
into either buffer 1 or buffer 2. To load data into either
buffer, an 8-bit opcode, 84H for buffer 1 or 87H for buffer 2,
is followed by 14 don't care bits and 10 address bits (BFA9-
BFA0). The 10 address bits specify the first byte in the
buffer to be written. The data is entered following the
address bits. If the end of the data buffer is reached, the
device will wrap around back to the beginning of the buffer.
Data will continue to be loaded into the buffer until a low to
high transition is detected on the CS pin.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH
BUILT-IN ERASE: Data written into either buffer 1 or buffer
2 can be programmed into the main memory. An 8-bit
opcode, 83H for buffer 1 or 86H for buffer 2, is followed by
the two reserved bits, 12 address bits (PA11-PA0) that
specify the page in the main memory to be written, and 10
additional don't care bits. When a low to high transition
occurs on the CS pin, the part will first erase the selected
page in main memory to all 1s and then program the data
stored in the buffer into the specified page in the main
memory. Both the erase and the programming of the page
are internally self timed and should take place in a maxi-
mum time of tEP. During this time, the status register will
indicate that the part is busy.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH-
OUT BUILT-IN ERASE: A previously erased page within
main memory can be programmed with the contents of
either buffer 1 or buffer 2. An 8-bit opcode, 88H for buffer 1
or 89H for buffer 2, is followed by the two reserved bits, 12
address bits (PA11-PA0) that specify the page in the main
memory to be written, and 10 additional don’t care bits.
When a low to high transition occurs on the CS pin, the part
will program the data stored in the buffer into the specified
page in the main memory. It is necessary that the page in
main memory that is being programmed has been previ-
ously erased. The programming of the page is internally
self timed and should take place in a maximum time of tP.
During this time, the status register will indicate that the
part is busy.
PAGE ERASE: The optional Page Erase command can be
used to individually erase any page in the main memory
array allowing the Buffer to Main Memory Page Program
without Built-In Erase command to be utilized at a later
time. To perform a Page Erase, an opcode of 81H must be
loaded into the device, followed by two reserved bits, 12
address bits (PA11-PA0), and 10 don’t care bits. The 12
address bits are used to specify which page of the memory
array is to be erased. When a low to high transition occurs
on the CS pin, the part will erase the selected page to 1s.
The erase operation is internally self-timed and should take
place in a maximum time of tPE. During this time, the status
register will indicate that the part is busy.
BLOCK ERASE: A block of eight pages can be erased at
one time allowing the Buffer to Main Memory Page Pro-
gram without Built-In Erase command to be utilized to
reduce programming times when writing large amounts of
data to the device. To perform a Block Erase, an opcode of
50H must be loaded into the device, followed by two
reserved bits, nine address bits (PA11-PA3), and 13 don’t
care bits. The nine address bits are used to specify which
block of eight pages is to be erased. When a low to high
transition occurs on the CS pin, the part will erase the
selected block of eight pages to 1s. The erase operation is
internally self-timed and should take place in a maximum
time of tBE. During this time, the status register will indicate
that the part is busy.
4 AT45D161

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AT45D161-JI 전자부품, 판매, 대치품
AT45D161
Absolute Maximum Ratings*
Temperature Under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
DC and AC Operating Range
AT45D161
Operating Temperature (Case)
Com.
Ind.
0°C to 70°C
-40°C to 85°C
VCC Power Supply(1)
4.5V to 5.5V
Notes: 1. After power is applied and VCC is at the minimum specified data sheet value, the system should wait 20 ms before an oper-
ational mode is started.
7

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