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PDF ADV7312 Data sheet ( Hoja de datos )
| Número de pieza | ADV7312 | |
| Descripción | Multiformat 11-Bit HDTV Video Encoder | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADV7312 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Multiformat 11-Bit
HDTV Video Encoder
ADV7312
FEATURES
High Definition Input Formats
8-, 16-, 24-Bit (4:2:2, 4:4:4) Parallel YCrCb
Compliant with:
SMPTE 293M (525p)
BTA T-1004 EDTV2 (525p)
ITU-R BT.1358 (625p/525p)
ITU-R BT.1362 (625p/525p)
SMPTE 274M (1080i) at 30 Hz and 25 Hz
SMPTE 296M (720p)
RGB in 3؋8-Bit 4:4:4 Input Format
HDTV RGB Supported:
RGB, RGBHV
Other High Definition Formats Using Async
Timing Mode
High Definition Output Formats
YPrPb Progressive Scan (EIA-770.1, EIA-770.2)
YPrPb HDTV (EIA 770.3)
RGB, RGBHV
CGMS-A (720p/1080i)
Macrovision Rev 1.1 (525p/625p)
CGMS-A (525p)
Standard Definition Input Formats
CCIR-656 4:2:2 8-, 16-Bit Parallel Input
Standard Definition Output Formats
Composite NTSC M/N
Composite PAL M/N/B/D/G/H/I, PAL-60
SMPTE 170M NTSC Compatible Composite Video
ITU-R BT.470 PAL Compatible Composite Video
S-Video (Y/C)
EuroScart RGB
Component YPrPb (Betacam, MII, SMPTE/EBU N10)
Macrovision Rev 7.1.L1
CGMS/WSS
Closed Captioning
GENERAL FEATURES
Simultaneous SD and HD Inputs and Outputs
Programmable DAC Gain Control
Sync Outputs in All Modes
On-Board Voltage Reference
Six 11-Bit Precision Video DACs
Purchase of licensed I2C components of Analog Devices or one of its
sublicensed Associated Companies conveys a license for the purchaser under
the Philips I2C Patent Rights to use these components in an I2C system,
provided that the system conforms to the I2C Standard Specification as
defined by Philips.
REV. 0
2-Wire Serial I2C® Interface
Dual I/O Supply 2.5 V/3.3 V Operation
Analog and Digital Supply 2.5 V
On-Board PLL
64-Lead LQFP Package
Lead (Pb) Free Product
APPLICATIONS
Enhanced Versatile Disk (EVD) Players
SD/PS DVD Recorders/Players
SD/Prog Scan/HDTV Display Devices
SD/HDTV Set Top Boxes
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
Y7–Y0
C7–C0
S7–S0
HSYNC
VSYNC
BLANK
CLKIN_A
CLKIN_B
STANDARD DEFINITION
CONTROL BLOCK
COLOR CONTROL
BRIGHTNESS
DNR
GAMMA
PROGRAMMABLE FILTERS
SD TEST PATTERN
D
E
M
U
X
TIMING
GENERATOR
PROGRAMMABLE
RGB MATRIX
HIGH DEFINITION
CONTROL BLOCK
HD TEST PATTERN
COLOR CONTROL
ADAPTIVE FILTER CTRL
SHARPNESS FILTER
PLL
ADV7312
11-BIT
DAC
O 11-BIT
V DAC
E
R
S
A
11-BIT
DAC
M
P 11-BIT
L DAC
I
N 11-BIT
G DAC
11-BIT
DAC
I2C
INTERFACE
GENERAL DESCRIPTION
The ADV®7312 is a high speed, digital-to-analog encoder on
a single monolithic chip. It includes six high speed video D/A
converters with TTL compatible inputs.
The ADV7312 has separate 8-, 16-bit input ports that accept
data in high definition and/or standard definition video format.
For all standards, external horizontal, vertical, and blanking
signals or EAV/SAV timing codes control the insertion of
appropriate synchronization signals into the digital data stream
and therefore the output signal.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
ADV7312
DYNAMIC SPECIFICATIONS (VAA = 2.375 V–2.625 V, VDD = 2.375 V–2.625 V; VDD_IO = 2.375 V–3.6 V, VREF = 1.235 V,
RSET = 3040 ⍀, RLOAD = 300 ⍀. All specifications TMIN to TMAX (0؇C to 70؇C), unless otherwise noted.)
Parameter
PROGRESSIVE SCAN MODE
Luma Bandwidth
Chroma Bandwidth
SNR
HDTV MODE
Luma Bandwidth
Chroma Bandwidth
STANDARD DEFINITION MODE
Hue Accuracy
Color Saturation Accuracy
Chroma Nonlinear Gain
Chroma Nonlinear Phase
Chroma/Luma Intermodulation
Chroma/Luma Gain Inequality
Chroma/Luma Delay Inequality
Luminance Nonlinearity
Chroma AM Noise
Chroma PM Noise
Differential Gain
Differential Phase
SNR
Specifications subject to change without notice.
Min
Typ
Max
Unit
12.5 MHz
5.8 MHz
65.6 dB
72 dB
30
13.75
0.4
0.4
1.2
–0.2
0
97.0
–1.1
0.5
84
75.2
0.20
0.15
59.1
77.1
MHz
MHz
°
%
±%
±°
±%
±%
ns
±%
dB
dB
%
°
dB
dB
Test Conditions
Luma ramp unweighted
Flat field full bandwidth
Referenced to 40 IRE
NTSC
NTSC
Luma ramp
Flat field full bandwidth
REV. 0
–5–
5 Page 
ADV7312
CLKIN_B
CONTROL
INPUTS
P_HSYNC,
P_VSYNC,
P_BLANK
Y7–Y0
t9 t10
Cb0
t12
t11
Y0
Cr0 Y1
t12
t11
Crxxx Yxxx
PS INPUT
CONTROL
INPUTS
CLKIN_A
S_HSYNC,
S_VSYNC,
S_BLANK
t9 t10
t12
S7–S0
Cb0 Y0 Cr0 Y1 Cb1 Y2
t11
Figure 10. PS (8-Bit) and SD (8-Bit) Simultaneous Input Mode [Input Mode 100]
SD INPUT
CLKIN_A
CONTROL
INPUTS
S_HSYNC,
S_VSYNC,
S_BLANK
t9 t10
t12
IN SLAVE MODE
S7–S0/Y7–Y0* Cb0 Cr0 Cb2 Cr2 Cb4 Cr4
CONTROL
OUTPUTS
t11
t13
t14
*SELECTED BY ADDRESS 0x01 BIT 7
Figure 11. 8-Bit SD Only Pixel Input Mode [Input Mode 000]
IN MASTER/SLAVE MODE
REV. 0
–11–
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADV7312.PDF ] | |
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