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PDF AKD5393 Data sheet ( Hoja de datos )
| Número de pieza | AKD5393 | |
| Descripción | EVALUATION BOARD REV.A FOR AK5393 | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AKD5393 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
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ASAHI KASEI
[AKD5393 Rev.A]
AKD5393
Evaluation board Rev.A for AK5393
General description
The AKD5393 is an evaluation board for the AK5393 professional audio 24bit A/D converter. The
AKD5393 includes the input buffer circuit and also has a digital interface transmitter. Further, the
AKD5393 can evaluate direct interface with AKM’s DAC evaluation boards.
n Ordering guide
AKD5393 Rev.A --- Evaluation board for AK5393VS
Function
• On-board Full-differential input buffer circuit
• On-board clock generator
• Compatible with 2 types of interface
1) Direct interface with AKM’s DAC evaluation boards.
2) On-board CS8402 as DIT which transmits optical output.
• A BNC connector for an external clock input.
+15V -15V
+5V GND +3.3V
Lch
Rch
Input
Buffer
AK5393
CS8402
(DIT)
Opt Out
Clock
Generator
D/A Data
10pin Header
* Circuit diagram and PCB layout are attached at the end of this manual.
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ASAHI KASEI
[AKD5393 Rev.A]
3. Jumper-set up and explanation
Set up the CS8402's data format corresponding the serial data interface of the AK5393.
AKD5393
Data Format
Slave mode
Mater mode
I2S Slave mode
I2S master mode
SMODE2
(SW2-5)
ON
ON
OFF
OFF
SMODE1
(SW2-4)
ON
OFF
ON
OFF
8402
(SW2-1)
ON
OFF
OFF
OFF
BCF
(JP6)
F
R
R
R
LRP
(JP10)
H
L
H
H
*DIP-SW is ON=”L”
OFF=”H”
Table 1. Serial data interface of AK5393 and CS8402
[SW2-1]: CS8402's data format
ON: MSB justified, 24bit
OFF: IIS Compatible
[JP6] : Define the polarity of SCLK.
F: SCLK is inverted.
R: SCLK coincides with AK5393
[JP10]: Define the polarity of LRCK.
L: LRCK is inverted.
H: LRCK coincides with AK5393.
4. The other function set up
No. PIN
ON OFF
1 8402 See the Table1.
2 DFS
48k 96k
3
HPFE
disable enable
4 SM1 Seethe Table 1.
5 SM2
6 CALMODE VCOM AIN
Table 2. DIP-SW2 set-up
*DIP-SW is ON=”L” OFF=”H”
→Selects the sampling rate.
→Selects HPF of AK5393.
→Selects the reference signal for Offset-Cal of K5383
VCOM:VCOML,VCOMR pin
AIN: Analog input pin (AINL±, AINR±)
[JP13]: Selects the analog power supply source to VA pin of the AK5393.
Open: Supply from the power supply terminal (VA+).
Short: Supply from 3-terminal-voltage regulator (+5V) on the board.
n The function of the toggle SW.
[SW3] Resets the CS8402. Upper position resets the internal counter of CS8402, then Bi-phase
signal is not output. Keep the "L" position during normal operation.
[SW4] Resets the AK5393. Keep the "H" position during conversion.
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AK5393(fs=48kHz)
Fig. 5 THD+N vs. Input frequency ( Input level = -1dB)
Fig. 6 THD+N vs. Input level (fin=1kHz)
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet AKD5393.PDF ] | |
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