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AKD5393 데이터시트 PDF




Asahi Kasei Microsystems에서 제조한 전자 부품 AKD5393은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 AKD5393 기능
기능 Enhanced Dual bit 96 kHz 24-bit ADC
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AKD5393 데이터시트, 핀배열, 회로
ASAHI KASEI
[AKD5393 Rev.A]
AKD5393
Evaluation board Rev.A for AK5393
General description
The AKD5393 is an evaluation board for the AK5393 professional audio 24bit A/D converter. The
AKD5393 includes the input buffer circuit and also has a digital interface transmitter. Further, the
AKD5393 can evaluate direct interface with AKM’s DAC evaluation boards.
n Ordering guide
AKD5393 Rev.A --- Evaluation board for AK5393VS
Function
On-board Full-differential input buffer circuit
On-board clock generator
Compatible with 2 types of interface
1) Direct interface with AKM’s DAC evaluation boards.
2) On-board CS8402 as DIT which transmits optical output.
A BNC connector for an external clock input.
+15V -15V
+5V GND +3.3V
Lch
Rch
Input
Buffer
AK5393
CS8402
(DIT)
Opt Out
Clock
Generator
D/A Data
10pin Header
* Circuit diagram and PCB layout are attached at the end of this manual.
<KM059101>
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AKD5393 pdf, 반도체, 판매, 대치품
ASAHI KASEI
[AKD5393 Rev.A]
1-2DIT (Optical Link)
PORT1 is used. DIT generates audio Bi-phase signal from received data and which is output through optical
connector (TOTX174). It is possible to connect AKM's D/A converter evaluation boards on the digital-amplifier,
which equips DIR input. There are two kinds of jumper setting depend on the SMODE1 and SMODE2 pin. The
interface signals are output from PORT2. (See the (4)). In case of using external clock through a BNC connector,
select EXT on JP11 (MCLK) and short JP12 (XTE).
[Slave mode] (Default)
JP9
LR
JP7
BC
JP11
JP12
EXT
XTL
MCLK
XTE
[Master mode]
JP9
LR
JP7
BC
JP11
JP12
EXT
XTL
MCLK
XTE
Figure 3. Jumper set up (DIT)
1-3 All interface signals (MCLK, BICK and LRCK) are fed from external circuit. [Slave mode]
Under the following setup, MCLK, LRCK and SCLK signals needed for the A/D to operate could be
Fed through PORT2.
JP9 JP7 JP11
JP12
EXT
XTL
LR BC MCLK XTE
Figure 4. Jumper set up (EXT)
1-4 Feed all interface signals to the external circuit through PORT2.
[Master, Slave mode]
Please set up as same as 1-2. All interfacing signal which drive AK5393 are output through PORT2.
However, the FSYNC signal is input when the position of the SDATA is needed to be controlled.
* Setting for double speed sampling (fs=96kHz)
For the double speed sampling, DFS="L", MCLK=128fs, BICK=64fs(max) are required.
So, when BICK and LRCK are created from 74HC4040 on the board, the crystal oscillator should be changed to
24.576MHz and set JP14 (MCLK2) to 128fs side (see the schematics).
2. BIT CLK (BCF) set up
JP8
128
64
BCF
[JP8] Either 64fs or 128fs for the BCF can be selected. Figure shows 128fs example.
When DFS="H", set JP8 to 64 side.
128: 128fs is fed to AK5393 as BICK.
64: 64fs is fed to AK5393 as BICK.
<KM059101>
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AKD5393 전자부품, 판매, 대치품
ASAHI KASEI
[AKD5393 Rev.A]
IMPORTANT NOTICE
These products and their specifications are subject to change without notice. Before considering any use or
application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor
concerning their current status.
AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or
use of any information contained herein.
Any export of these products, or devices or systems containing them, may require an export license or other
official approval under the law and regulations of the country of export pertaining to customs and tariffs,
currency exchange, or strategic materials.
AKM products are neither intended nor authorized for use as critical components in any safety, life support, or
other hazard related device or system, and AKM assumes no responsibility relating to any such use, except
with the express written consent of the Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it,
and which must therefore meet very high standards of performance and reliability.
It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise
places the product with a third party to notify that party in advance of the above content and conditions, and the
buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from
any and all claims arising from the use of said product in the absence of such notification.
<KM059101>
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