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ADS8322YB 데이터시트 PDF




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부품번호 ADS8322YB 기능
기능 16-Bit/ 500kHz/ MicroPower Sampling ANALOG-TO-DIGITAL CONVERTER
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ADS8322YB 데이터시트, 핀배열, 회로
ADS8322 ®
ADS8322
SBAS215 JULY 2001
16-Bit, 500kHz, MicroPower Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q HIGH-SPEED PARALLEL INTERFACE
q 500kHz SAMPLING RATE
q LOW POWER: 85mW at 500kHz
q INTERNAL 2.5V REFERENCE
q UNIPOLAR INPUT RANGE
q TQFP-32 PACKAGE
APPLICATIONS
q CT SCANNERS
q HIGH SPEED DATA ACQUISITION
q TEST AND INSTRUMENTATION
q MEDICAL EQUIPMENT
DESCRIPTION
The ADS8322 is a 16-bit, 500kHz Analog-to-Digital (A/D)
converter with an internal 2.5V reference. The device in-
cludes a 16-bit capacitor-based Successive Approximation
Register (SAR) A/D converter with inherent sample-and-
hold. The ADS8322 offers a full 16-bit interface, or an 8-bit
option where data is read using two read cycles and 8 pins.
The ADS8322 is available in a TQFP-32 package and is
guaranteed over the industrial –40°C to +85°C temperature
range.
SAR
+IN
–IN
REFIN
REFOUT
ADS8322
S/H Amp
CDAC
Comparator
Internal
+2.5V Ref
Output Latches
and
Three State
Drivers
BYTE
Parallel
Data
Output
Conversion
and Control
Logic
CLOCK
CONVST
CS
RD
BUSY
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 2001, Texas Instruments Incorporated




ADS8322YB pdf, 반도체, 판매, 대치품
TIMING DIAGRAM
CLOCK
Acquisition
t1
t3
t2
12
CONVST
t4
t6
t5
345
Conversion
tCONV
BUSY
t7
BYTE
CS
t8
RD
DB15-D8
DB7-D0
17 18 19 20 1 2 3 4
Acquisition
tACQ
t9
t10
t11
t12
t13
t16
t15
t14
t17
Bits 15-8
Bits 7-0
17 18 19 20
t18
t19
Bits 15-8
Bits 7-0
FF
Bits 15-8
TIMING CHARACTERISTICS(1)(2)
All specifications typical at 40°C to +85°C, +VD = +5V.
ADS8322A
ADS8322B
PARAMETER
SYMBOL
MIN TYP MAX MIN TYP MAX UNITS
Conversion Time
Acquisition Time
CLOCK Period
CLOCK High Time
CLOCK Low Time
CONVST Low to Clock High
CLOCK High to CONVST High
CONVST Low Time
CONVST Low to BUSY High
CS Low to CONVST Low
CONVST High
CLOCK Low to CONVST Low
CLOCK High to BUSY Low
CS High
CS Low to RD Low
RD High to CS High
RD Low Time
RD Low to Data Valid
Data Hold from RD High
BYTE Change to RD Low(3)
RD High Time
tCONV
tACQ
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
t17
t18
t19
1.6
0.4
100
40
40
10
5
20
25
0
20
0
25
0
0
0
50
40
5
0
20
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES: (1) All input signals are specified with tR = tF = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH) /2. (2) See timing diagram, above.
(3) BYTE is asynchronous; when BYTE is 0, bits 15 through 0 appear at DB15-DB0. When BUSY is 1, bits 15 through 8 appear on DB7-DB0. RD may remain low
between changes in BYTE.
4 ADS8322
SBAS215

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ADS8322YB 전자부품, 판매, 대치품
THEORY OF OPERATION
The ADS8322 is a high-speed Successive Approximation
Register (SAR) A/D converter with an internal 2.5V bandgap
reference. The architecture is based on capacitive redistribu-
tion which inherently includes a sample-and-hold function.
The basic operating circuit for the ADS8322 is shown in
Figure 1.
The ADS8322 requires an external clock to run the conver-
sion process. The clock can be run continuously or it can be
gated to conserve power between conversions. This clock
can vary between 25kHz (1.25kHz throughput) and 10MHz
(500kHz throughput). The duty cycle of the clock is unim-
portant as long as the minimum HIGH and LOW times are
at least 40ns and the clock period is at least 100ns. The
minimum clock frequency is governed by the parasitic
leakage of the Capacitive Digital-to-Analog (CDAC) ca-
pacitors internal to the ADS8322.
The analog input is provided to two input pins, +IN and –IN.
When a conversion is initiated, the differential input on these
pins is sampled on the internal capacitor array. While a
conversion is in progress, both inputs are disconnected from
any internal function.
REFERENCE
Under normal operation, the REFOUT pin should be directly
connected to the REFIN pin to provide an internal +2.5V
reference to the ADS8322. The ADS8322 can operate,
however, with an external reference in the range of 1.5V to
2.6V for a corresponding full-scale range of 3.0V to 5.2V.
The internal reference of the ADS8322 is double-buffered.
If the internal reference is used to drive an external load, a
buffer is provided between the reference and the load ap-
plied to the REFOUT pin (the internal reference can typically
source and sink 10µA of current). If an external reference is
used, the second buffer provides isolation between the exter-
nal reference and the CDAC. This buffer is also used to
recharge all of the CDAC capacitors during conversion.
ANALOG INPUT
When the converter enters Hold mode, the voltage differ-
ence between the +IN and –IN inputs is captured on the
internal capacitor array. The voltage on the –IN input is
+5V Analog Supply
10µF
+
0.1µF
0.1µF
32 31 30 29 28 27 26 25
1 DB15
2 DB14
3 DB13
4 DB12
5 DB11
6 DB10
7 DB9
8 DB8
ADS8322
CS 24
BYTE 23
RD 22
CONVST 21
CLOCK 20
DGND 19
+VD 18
BUSY 17
9 10 11 12 13 14 15 16
+
Analog Input
Chip Select
Read Input
Conversion Start
Clock Input
Busy Output
FIGURE 1. Typical Circuit Configuration.
ADS8322
SBAS215
7

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관련 데이터시트

부품번호상세설명 및 기능제조사
ADS8322Y

16-Bit/ 500kHz/ MicroPower Sampling ANALOG-TO-DIGITAL CONVERTER

Burr-Brown Corporation
Burr-Brown Corporation
ADS8322YB

16-Bit/ 500kHz/ MicroPower Sampling ANALOG-TO-DIGITAL CONVERTER

Burr-Brown Corporation
Burr-Brown Corporation

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