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PDF ADS8325IBDGKT Data sheet ( Hoja de datos )
| Número de pieza | ADS8325IBDGKT | |
| Descripción | 16-Bit/ High-Speed/ 2.7V to 5.5V microPower Sampling ANALOG-TO-DIGITAL CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
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ADS8325
ADS8325
ADS8325
SBAS226A – MARCH 2002 – REVISED JUNE 2003
16-Bit, High-Speed, 2.7V to 5.5V microPower Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
DESCRIPTION
q 16-BITS NO MISSING CODES
q VERY LOW NOISE: 3LSBp-p
q EXCELLENT LINEARITY: ±1.5LSB typ
q microPOWER: 4.5mW at 100kHz
1mW at 10kHz
q MSOP-8 AND SON-8 PACKAGES
(SON Package Size Same as 3x3 QFN)
q 16-BIT UPGRADE TO THE 12-BIT ADS7816
AND ADS7822
q PIN-COMPATIBLE WITH THE ADS7816,
ADS7822, ADS7826, ADS7827, ADS7829, AND
ADS8320
q SERIAL (SPI™/SSI) INTERFACE
APPLICATIONS
q BATTERY-OPERATED SYSTEMS
q REMOTE DATA ACQUISITION
q ISOLATED DATA ACQUISITION
q SIMULTANEOUS SAMPLING, MULTI-CHANNEL
SYSTEMS
q INDUSTRIAL CONTROLS
q ROBOTICS
q VIBRATION ANALYSIS
The ADS8325 is a 16-bit, sampling, Analog-to-Digital (A/D)
converter specified for a supply voltage range from 2.7V to
5.5V. It requires very little power, even when operating at the
full 100kHz data rate. At lower data rates, the high speed of
the device enables it to spend most of its time in the power-
down mode. For example, the average power dissipation is
less than 1mW at a 10kHz data rate.
The ADS8325 offers excellent linearity and very low noise
and distortion. It also features a synchronous serial (SPI/SSI
compatible) interface and a differential input. The reference
voltage can be set to any level within the range of 2.5V to
VDD.
Low power and small size make the ADS8325 ideal for
portable and battery-operated systems. It is also a perfect fit
for remote data acquisition modules, simultaneous multi-
channel systems, and isolated data acquisition. The ADS8325
is available in MSOP-8 and SON-8 packages.
The SON package size is the same as a 3x3 QFN package.
SAR
REF
+IN
–IN
ADS8325
S/H Amp
CDAC
Comparator
Serial
Interface
DOUT
DCLOCK
CS/SHDN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 2002-2003, Texas Instruments Incorporated
1 page  
ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature at –40°C to 85°C, VREF = VDD, –IN = GND, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise noted.
PARAMETER
POWER-SUPPLY REQUIREMENTS
Power Supply (VDD)
Operating Supply Current (IDD)
Power-Down Supply Current (IDD)
Power Dissipation
Power Dissipation in Power-Down
✻ indicates the same specifications as the ADS8325I.
CONDITIONS
Low-Voltage Levels
5V Logic Levels
VDD = 3V
VDD = 5V
VDD = 3V
VDD = 5V
VDD = 3V
VDD = 5V
VDD = 3V, CS = VDD
VDD = 5V, CS = VDD
ADS8325I
MIN TYP MAX
2.7 3.6
4.5 5.5
0.75
1.5
0.9 1.5
0.1
0.2
2.25
4.5
4.5 7.5
0.3
0.6
ADS8325IB
MIN TYP MAX
UNITS
✻ ✻V
✻ ✻V
✻ ✻ mA
✻ ✻ mA
✻ µA
✻ µA
✻ ✻ mW
✻ ✻ mW
✻ µW
✻ µW
PIN CONFIGURATION
Top View
MSOP
REF 1
+IN 2
–IN 3
GND 4
ADS8325
8 +VDD
7 DCLOCK
6 DOUT
5 CS/SHDN
Top View
SON
PIN DESCRIPTIONS
NAME PIN I/O DESCRIPTION
REF
1 AI Reference Input
+IN 2 AI Noninverting Input
–IN 3 AI Inverting Analog Input
GND
4 P Ground
CS/SHDN 5
DI Chip Select when LOW, Shutdown Mode when
HIGH.
DOUT
6 DO The serial output data word.
DCLOCK 7 DI Data Clock synchronizes the serial data transfer
and determines conversion speed.
VDD 8 P Power Supply
NOTE: AI is Analog Input, DI is Digital Input, DO is Digital Output, and P is
Power-Supply Connection.
REF 1
8 +VDD
+IN 2
7 DCLOCK
ADS8325
–IN 3
6 DOUT
GND 4
5 CS/SHDN
ADS8325
SBAS226A
www.ti.com
5
5 Page 
THEORY OF OPERATION
The ADS8325 is a classic Successive Approximation Register
(SAR) Analog-to-Digital (A/D) converter. The architecture is based
on capacitive redistribution that inherently includes a sample-and-
hold function. The converter is fabricated on a 0.6µ CMOS
process. The architecture and process allow the ADS8325 to
acquire and convert an analog signal at up to 100,000 conver-
sions per second while consuming less than 4.5mW from +VDD.
The ADS8325 requires an external reference, an external clock,
and a single power source (VDD). The external reference can be
any voltage between 2.5V and 5.5V. The value of the reference
voltage directly sets the range of the analog input. The reference
input current depends on the conversion rate of the ADS8325.
The external clock can vary between 24kHz (1kHz throughput)
and 2.4MHz (100kHz throughput). The duty cycle of the clock is
essentially unimportant as long as the minimum high and low
times are at least 200ns (VDD = 4.75V or greater). The minimum
clock frequency is set by the leakage on the internal capacitors
to the ADS8325.
The analog input is provided to two input pins: +IN and –IN. When
a conversion is initiated, the differential input on these pins is
sampled on the internal capacitor array. While a conversion is in
progress, both inputs are disconnected from any internal function.
The digital result of the conversion is clocked out by the DCLOCK
input and is provided serially, most significant bit first, on the DOUT
pin. The digital data that is provided on the DOUT pin is for the
conversion currently in progress—there is no pipeline delay. It is
possible to continue to clock the ADS8325 after the conversion
is complete and to obtain the serial data least significant bit first.
See the Digital Timing section for more information.
ANALOG INPUT
The analog input of ADS8325 is differential. The +IN and
–IN input pins allow for a differential input signal. The
amplitude of the input is the difference between the +IN and
–IN input, or (+IN) – (–IN). Unlike some converters of this
type, the –IN input is not resampled later in the conversion
cycle. When the converter goes into the hold mode or
conversion, the voltage difference between +IN and –IN is
captured on the internal capacitor array.
The range of the –IN input is limited to –0.3V to +0.5V. Due
to this, the differential input could be used to reject signals
that are common to both inputs in the specified range. Thus,
the –IN input is best used to sense a remote signal ground
that may move slightly with respect to the local ground
potential.
The general method for driving the analog input of the
ADS8325 is shown in Figures 1 and 2. The –IN input is held
at the common-mode voltage. The +IN input swings from
–IN (or common-mode voltage) to –IN + VREF (or common-
mode voltage + VREF), and the peak-to-peak amplitude is
+VREF. The value of VREF determines the range over which
the common-mode voltage may vary (see Figure 3). Figures
5 and 6 illustrate the typical change in gain and offset as a
function of the common-mode voltage applied to the –IN pin.
0V to +VREF
Peak-to-Peak
Common-Mode
Voltage
ADS8325
FIGURE 2. Methods of Driving the ADS8325
The input current required by the analog inputs depends on
a number of factors: sample rate, input voltage, source
impedance, and power-down mode. Essentially, the current
into the ADS8325 charges the internal capacitor array during
the sample period. After this capacitance has been fully
charged, there is no further input current. The source of the
analog input voltage must be able to charge the input
capacitance (20pF) to a 16-bit settling level within 4.5 clock
cycles (1.875µs). When the converter goes into the hold
mode, or while it is in the power-down mode, the input
impedance is greater than 1GΩ.
Common-Mode Voltage + VREF
+VREF
+IN
Common-Mode Voltage
–IN = Common-Mode Voltage
NOTE: The maximum differential voltage between +IN and –IN of the ADS8325 is VREF.
See Figure 3 for a further explanation of the common-mode voltage range for differential inputs.
FIGURE 1. Differential Input Mode of the ADS8325.
ADS8325
SBAS226A
www.ti.com
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11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet ADS8325IBDGKT.PDF ] | |
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