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16F872 PDF 데이터시트 ( Data , Function )

부품번호 16F872 기능
기능 28-Pin/ 8-Bit CMOS FLASH Microcontroller
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16F872 데이터시트, 핀배열, 회로
PIC16F872
28-Pin, 8-Bit CMOS FLASH Microcontroller
Devices Included in this Data Sheet:
• PIC16F872
Microcontroller Core Features:
• High-performance RISC CPU
• Only 35 single word instructions to learn
• All single cycle instructions except for program
branches which are two cycle
• Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle
• 2K x 14 words of FLASH Program Memory
128 x 8 bytes of Data Memory (RAM)
64 x 8 bytes of EEPROM Data Memory
• Pinout compatible to the PIC16C72A
• Interrupt capability (up to 10 sources)
• Eight level deep hardware stack
• Direct, indirect and relative addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT) and Oscillator Start-up
Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Programmable code-protection
• Power saving SLEEP mode
• Selectable oscillator options
• Low-power, high-speed CMOS FLASH/EEPROM
technology
• Fully static design
• In-Circuit Serial Programming(ICSP) via two
pins
• Single 5V In-Circuit Serial Programming capability
• In-Circuit Debugging via two pins
• Processor read/write access to program memory
• Wide operating voltage range: 2.0V to 5.5V
• High Sink/Source Current: 25 mA
• Commercial and Industrial temperature ranges
• Low-power consumption:
- < 2 mA typical @ 5V, 4 MHz
- 20 µA typical @ 3V, 32 kHz
- < 1 µA typical standby current
Pin Diagram
DIP, SOIC, SSOP
MCLR/VPP/THV
RA0/AN0
RA1/AN1
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4/SS
VSS
OSC1/CLKIN
OSC2/CLKOUT
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 RB7/PGD
27 RB6/PGC
26 RB5
25 RB4
24 RB3/PGM
23 RB2
22 RB1
21 RB0/INT
20 VDD
19 VSS
18 RC7
17 RC6
16 RC5/SDO
15 RC4/SDI/SDA
Peripheral Features:
• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler,
can be incremented during sleep via external
crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period
register, prescaler and postscaler
• One Capture, Compare, PWM module
- Capture is 16-bit, max. resolution is 12.5 ns
- Compare is 16-bit, max. resolution is 200 ns
- PWM max. resolution is 10-bit
• 10-bit multi-channel Analog-to-Digital converter
• Synchronous Serial Port (SSP) with SPI(Master
Mode) and I2C(Master/Slave)
• Brown-out detection circuitry for Brown-out Reset
(BOR)
© 1999 Microchip Technology Inc.
Preliminary
DS30221A-page 1




16F872 pdf, 반도체, 판매, 대치품
PIC16F872
NOTES:
DS30221A-page 4
Preliminary
© 1999 Microchip Technology Inc.

4페이지










16F872 전자부품, 판매, 대치품
2.0 MEMORY ORGANIZATION
There are three memory blocks in each of these
PICmicro® MCUs. The Program Memory and Data
Memory have separate buses, so that concurrent
access can occur, and is detailed in this section. The
EEPROM data memory block is detailed in
Section 4.0.
Additional information on device memory may be found
in the PICmicroMid-Range Reference Manual,
(DS33023).
2.1 Program Memory Organization
The PIC16F872 devices have a 13-bit program counter
capable of addressing an 8K x 14 program memory
space. The PIC16F872 device has 2K x 14 words of
FLASH program memory. Accessing a location above
the physically implemented address will cause a wrap-
around.
The reset vector is at 0000h and the interrupt vector is
at 0004h.
FIGURE 2-1: PIC16F872 PROGRAM
MEMORY MAP AND STACK
PC<12:0>
CALL, RETURN
RETFIE, RETLW
13
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
0000h
PIC16F872
2.2 Data Memory Organization
The data memory is partitioned into multiple banks
which contain the General Purpose Registers and the
Special Function Registers. Bits RP1(STATUS<6>)
and RP0 (STATUS<5>) are the bank select bits.
RP<1:0>
00
Bank
0
01 1
10 2
11 3
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM. All implemented banks contain Special
Function Registers. Some “high use” Special Function
Registers from one bank may be mirrored in another
bank for code reduction and quicker access.
Note: EEPROM Data Memory description can be
found in Section 4.0 of this Data Sheet
2.2.1 GENERAL PURPOSE REGISTER FILE
The register file can be accessed either directly, or indi-
rectly through the File Select Register FSR.
On-Chip
Program
Memory
Interrupt Vector
Page 0
0004h
0005h
07FFh
0800h
1FFFh
© 1999 Microchip Technology Inc.
Preliminary
DS30221A-page 7

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