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PDF ADM1485 Data sheet ( Hoja de datos )
| Número de pieza | ADM1485 | |
| Descripción | +-5 V Low Power EIA RS-485 Transceiver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Meets EIA RS-485 Standard
30 Mbps Data Rate
Single 5 V Supply
–7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short-Circuit Protection
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 15 ns
High-Z Outputs with Power Off
Superior Upgrade for LTC1485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
5 V Low Power
EIA RS-485 Transceiver
ADM1485
FUNCTIONAL BLOCK DIAGRAM
8-Lead
ADM1485
RO R
RE
DE
DI D
VCC
B
A
GND
GENERAL DESCRIPTION
The ADM1485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission and
complies with both RS-485 and RS-422 EIA Standards. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver may be enabled independently.
When disabled, the outputs are three-stated.
The ADM1485 operates from a single 5 V power supply. Excessive
power dissipation caused by bus contention or by output shorting
is prevented by a thermal shutdown circuit. This feature forces
the driver output into a high impedance state if, during fault condi-
tions, a significant temperature increase is detected in the internal
driver circuitry.
Up to 32 transceivers may be connected simultaneously on a bus,
but only one driver should be enabled at any time. It is important,
therefore, that the remaining disabled drivers do not load the bus.
To ensure this, the ADM1485 driver features high output
impedance when disabled and also when powered down.
This minimizes the loading effect when the transceiver is not being
used. The high impedance driver output is maintained over the
entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology. All inputs and outputs contain
protection against ESD; all driver outputs feature high source
and sink current capability. An epitaxial layer is used to guard
against latch-up.
The ADM1485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at typical data rates
of 30 Mbps while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in PDIP, SOIC, and small
MSOP packages.
REV. '
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/461-3113 © 2012 Analog Devices, Inc. All rights reserved.
1 page  
ADM1485
Test Circuits
VOD
R
R VOC
Test Circuit 1. Driver Voltage Measurement
375⍀
VOD3
60⍀
375⍀
VTST
Test Circuit 2. Driver Voltage Measurement
A
CL1
RLDIFF
B CL2
Test Circuit 3. Driver Propagation Delay
Switching Characteristics
3V
1.5V
1.5V
0V tPLH
B
1/2VO
VO
A
VO
0V
–VO
90% POINT
10% POINT
tR
tSKEW = ͦtPLH – tPHLͦ
tPHL
90% POINT
10% POINT
tF
Figure 1. Driver Propagation Delay, Rise/Fall Timing
0V OR 3V
VCC
A
RL
S1 S2
DE
B
CL VOUT
DE IN
Test Circuit 4. Driver Enable/Disable
A
B RE
VOUT
CL
Test Circuit 5. Receiver Propagation Delay
+1.5V
S1
–1.5V
RL
RE
CL VOUT
VCC
S2
RE IN
Test Circuit 6. Receiver Enable/Disable
A, B
0V
0V
tPLH
tPHL
VOH
RO
1.5V
tSKEW = ͦtPLH – tPHLͦ
1.5V
VOL
Figure 3. Receiver Propagation Delay
DE 1.5V
tZL
1.5V
tLZ
3V
0V
A, B
A, B
2.3V
tZH
2.3V
VOL + 0.5V
tHZ
VOH – 0.5V
VOL
VOH
0V
Figure 2. Driver Enable/Disable Timing
1.5V
RE
tZL
1.5V
tLZ
3V
0V
–4–
1.5V
R
O/P LOW
VOL + 0.5V
VOL
tZH tHZ
O/P HIGH
VOH
R
1.5V
VOH – 0.5V
0V
Figure 4. Receiver Enable/Disable Timing
REV. '
5 Page 
ADM1485
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
85
14
0.210 (5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.100 (2.54)
BSC
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.060 (1.52)
MAX
0.015
(0.38)
MIN
SEATING
PLANE
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 8. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model1
ADM1485JNZ
ADM1485JRZ
ADM1485JR-REEL
ADM1485JRZ-REEL
ADM1485ANZ
ADM1485ARMZ
ADM1485ARMZ-REEL
ADM1485ARMZ-REEL7
ADM1485ARZ
ADM1485ARZ-REEL
ADM1485ARZ-REEL7
ADM1485JCHIPS
1 Z = RoHS Compliant Part.
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead PDIP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Package Option
N-8
R-8
R-8
R-8
N-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
Die
Brand
M42
M42
M42
–10–
REV. F
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADM1485.PDF ] | |
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