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PDF ADM8211 Data sheet ( Hoja de datos )

Número de pieza ADM8211
Descripción IEEE802.11b WLAN NIC Solution
Fabricantes ETC 
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No Preview Available ! ADM8211 Hoja de datos, Descripción, Manual

ADM8211
IEEE802.11b WLAN NIC Solution
PCI/miniPCI/Cardbus Interface with MAC Unit +
Baseband Processor (BBP)
DATASHEET
Rev. 1.1
Feb, 2003
Information in this document is provided in connection with ADMtek products. ADMtek may make changes to
specifications and product descriptions at any time, without notice. Designers must not rely on the absence or
characteristics of any features or instructions marked "reserved" or "undefined." ADMtek reserves these for future
definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to
them.
The products may contain design defects or errors known as errata, which may cause the product to deviate from
published specifications. Current characterized errata are available on request. To obtain latest documents, please contact
your local ADMtek sales office or your distributor or visit ADMtek’s website at http://www.ADMtek.com.tw
*Third-party brands and names are the property of their respective owners.
ADMtek
Partnership Now & Future
1

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ADM8211 pdf
1 General Description
ADM8211 is a high performance PCI/miniPCI/Cardbus single chip with WLAN MAC controller and
Baseband processor integrated.
ADMtek is the leading of networking SOC, based on mature experience, ADM8211 is designed as
hardwired architecture to reach the cost effective target.
With the features of SRAM-needless, power saving, WEP/fix, small-package…etc. ADM8211 is
versatile for WLAN system manufacturers to develop IEEE 802.11b wireless product.
Tx Buffer
Management
Tx FIFO
Tx MAC
Modulator
Arbiter
WEP Engine
Preamble/Header
Rx Buffer
Management
Rx FIFO
Rx MAC
WLAN CSR
Magic Pkt / Wake-up
Frame
WLAN CR
EEPROM I/F
LED/GPIO
Clock Gen
Demodulator
DAC
ADC
ADMtek
Partnership Now & Future
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ADM8211 arduino
L10 AD9
M13 AD8
N14 AD7
L14 AD6
K11 AD5
L13 AD4
K12 AD3
J11 AD2
J12 AD1
H14 AD0
N2 C-BEB3 I/O
N5 C-BEB2
P12 C-BEB1
M14 C-BEB0
P2 IDSEL I
M2 FRAME# I/O
P6 IRDY# I/O
P7 TRDY# I/O
L8 DEVSEL# I/O
M10 STOP# I/O
M9 PERR#
N8 SERR#
N11 PAR
I/O
O/D
I/O
J14 CLKRUN I/O
O/D
P10 PCI/CB I
Bus command and byte enable
Initialization Device Select. This signal is asserted when host issues
the configuration cycles to the ADM8211.
Begin and duration of bus access, driven by master device
Master device is ready to data transaction
Slave device is ready to data transaction
Device select, target is driving to indicate the address is decoded
Target device request the master device to stop the current
transaction
Data parity error is detected, driven by the agent receiving data
Address parity error
Parity, even parity (AD[31:0] + C/BE[3:0]), master drives par for
address and write data phase, target drives par for read data phase
Clock Run for PCI system. In the normal operation situation, Host
should assert this signal to indicate ADM8211 about the normal
situation. On the other hand, when Host will deassert this signal
when the clock is going down to a nonoperating frequency. When
ADM8211 recognizes the deasserted status of clk-run, then it will
assert clk-run to request host to maintain the normal clock
operation. When clk-run function is disabled then the ADM8211 will
set clk-run in tri-state.
Bonding low to select CARD bus mode.
Internal pull up. 5V-tolerant
5.2 EEPROM Interface
Pin Name Type
Description
B11 EECK I/O
ECK: Clock output to serial EEPROM.
pull-up, 5V tolerant
A12 EEDI I/O
EDI: Data output to serial EEPROM.
pull-up, 5V tolerant
ADMtek
Partnership Now & Future
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