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ADM8699 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADM8699은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 ADM8699 기능
기능 Microprocessor Supervisory Circuits
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ADM8699 데이터시트, 핀배열, 회로
a
FEATURES
Superior Upgrade for ADM698/ADM699, MAX698/MAX699
Guaranteed RESET Assertion with VCC = 1 V
Low 70 A Supply Current
Precision 4.65 V Voltage Monitor
Power OK/Reset Time Delay
Watchdog Timer
Minimum Component Count
Performance Specified over Temperature
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
Critical P Power Monitoring
GENERAL DESCRIPTION
The ADM8698/ADM8699 supervisory circuits provide power
supply monitoring and watchdog timing for microprocessor
systems.
The ADM8698 monitors the 5 V VCC power supply and gener-
ates a RESET pulse during power up, power down and during
low voltage “Brown Out” conditions. The RESET output is
guaranteed to be functional (logic low) with VCC as low as 1 V.
The ADM8699 features an identical monitoring circuit as in the
ADM8698, plus an additional watchdog timer input to monitor
microprocessor activity. The RESET output is forced low if the
watchdog input is not toggled within the 1 second watchdog
timeout period.
Both parts are available in 8-pin plastic DIP/SOIC and 16-lead
SOIC packages. The 16-lead SOIC contains additional out-
puts RESET (without inversion) and Watchdog Output WDO
(ADM8699 only).
Microprocessor
Supervisory Circuits
ADM8698/ADM8699
FUNCTIONAL BLOCK DIAGRAM
VCC
4.65V
ADM8698/
ADM8699
RESET
GENERATOR
WATCHDOG
INPUT
WDI*
WATCHDOG
TRANSITION DETECTOR
(1 sec)
RESET*
RESET
WATCHDOG
OUTPUT WDO*
*WDI (ADM8699 ONLY)
RESET (SOIC ONLY)
WDO (ADM8699 SOIC ONLY)
TYPICAL APPLICATION CIRCUIT
+5V
VCC
RESET
µP POWER
µP RESET
ADM8698/
ADM8699
µP SYSTEM
WDI*
I/O LINE
GND
*ADM8699 ONLY
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997




ADM8699 pdf, 반도체, 판매, 대치품
ADM8698/ADM8699
CIRCUIT INFORMATION
Power Fail RESET
A precision voltage detector monitors VCC and generates a
RESET output to hold the microprocessor’s Reset line low when
VCC falls below the reset threshold 4.65 V (see Figure 4). The
reset voltage threshold is set to accommodate a 5% variation on
VCC. The voltage detector has 40 mV hysteresis to ensure that
glitches on VCC do not activate the RESET output.
On power-up, an internal monostable holds RESET low for
140 ms after VCC rises above the reset threshold. This allows the
power supply to stabilize on power-up and also prevents repeated
toggling of RESET even if the 5 V power drops out and recovers
with each power line cycle. In order to prevent mistriggering
due to transient voltage spikes, it is recommended that a 0.1 µF
capacitor be connected at the VCC pin.
The RESET output is guaranteed to remain low with VCC, as
low as 1 V. This holds the microprocessor in a stable shutdown
condition as the power supply comes up.
On the 16-lead SOIC package, an active high RESET output is
also provided. This is the complement of RESET and is in-
tended for microprocessors requiring an active high signal.
Watchdog Timer (ADM8699 Only)
The watchdog timer input (WDI) monitors an I/O line from the
µP system. The µP must toggle this input once every 1.6 sec-
onds to verify correct software execution. Failure to toggle the
line indicates that the µP system is not correctly executing its
program and may be tied up in an endless loop. If this happens,
a reset pulse is generated to initialize the processor.
The WDI input is a three level input and will recognize a low-
to-high or high-to-low transition on its input. The watchdog
timer is reset by each WDI transition and then begins its timeout
period. If the WDI pin remains either high or low, reset pulses
will be issued every 1.6 seconds typically. If the watchdog timer
is not needed, the WDI input should be left floating.
The Watchdog Output (WDO) (SOIC package Only) provides
watchdog status information. It is driven low if WDI is not
toggled within the watchdog timeout period. It goes high at the
next WDI transition. It is also set high when VCC falls below the
reset threshold.
WDI
VCC
V2
V1 V2
V1
WDO
RESET
t1
t1
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
THRESHOLD HYSTERESIS
t1 = RESET TIME
Figure 4. Watchdog Timeout Period vs. Temperature
t2 t2
RESET
t1
t1 t1
tt12
=
=
RESET TIME
WATCHDOG
TIME
OUT
PERIOD
Figure 5. Watchdog Timeout Period and Reset Active Time
8-Pin Plastic DIP (N-8)
PIN 1
8
1
5
0.25 0.31
(6.35) (7.87)
4
0.430 (10.92)
MAX
0.035
(0.89)
0.18 (4.57)
0.018 (0.46)
0.1 (2.54)
BSC
0.011
(0.28)
0.3 (7.62)
0.125
(3.18)
MIN
SEATING
PLANE
0.033 (0.84)
0.18
(4.57)
MAX
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin SOIC (R-8)
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
8
1
5
0.1574 (4.00)
4 0.1497 (3.80)
PIN 1 0.102 (2.59)
0.094 (2.39)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0196
0.0099
(0.50)
(0.25)
x
45°
8°
0.0098 (0.25) 0° 0.0500 (1.27)
0.0075 (0.19)
0.0160 (0.41)
–4–
16-Lead SOIC (R-16)
16
0.299
(7.60)
1
9
0.419
(10.65)
8
0.012
(0.3)
0.030
(0.75)
0.013
(0.32)
0.413 (10.50)
0.104
(2.65)
0.05 (1.27) 0.019 (0.49)
REF
0.042
(1.07)
REV. 0

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