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ADM8830ACP-REEL7 데이터시트 PDF




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부품번호 ADM8830ACP-REEL7 기능
기능 Charge Pump Regulator for Color TFT Panel
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ADM8830ACP-REEL7 데이터시트, 핀배열, 회로
FEATURES
3 Output Voltages (+5.1 V, +15.3 V, –10.2 V) from
One 3 V Input Supply
Power Efficiency Optimized for Use with TFT in
Mobile Phones
Low Quiescent Current
Low Shutdown Current (<1 A)
Fast Transient Response
Shutdown Function
Power Saving during Blanking Period
Option to Use External LDO
APPLICATIONS
Handheld Instruments
TFT LCD Panels
Cellular Phones
GENERAL DESCRIPTION
The ADM8830 is a charge pump regulator used for color thin
film transistor (TFT) liquid crystal displays (LCDs). Using
charge pump technology, the device can be used to generate three
output voltages (+5.1 V ± 2%, +15.3 V, –10.2 V) from a single
3 V input supply. These outputs are then used to provide
supplies for the LCD controller (5.1 V) and the gate drives for
the transistors in the panel (+15.3 V and –10.2 V). Only a few
external capacitors are needed for the charge pumps. An efficient
low dropout voltage regulator also ensures that the power
efficiency is high and provides a low ripple 5.1 V output. This
LDO can be shut down and an external LDO used to regulate
the 5 V doubler output and drive the input to the charge pump
section, which generates the +15.3 V and –10.2 V outputs if so
required by the user.
The ADM8830 has an internal 100 kHz oscillator for use in
scanning mode, but the part must be clocked by an external clock
source in blanking (low current) mode.The internal oscillator is
used to clock the charge pumps during scanning mode where the
current is highest. During blanking periods, the ADM8830
switches to use an external, lower frequency clock.This allows the
user to vary the frequency and maximize power efficiency during
blanking periods.The tolerances on the output voltages are
Charge Pump Regulator
for Color TFT Panel
ADM8830
FUNCTIONAL BLOCK DIAGRAM
CLKIN
SCAN/BLANK
LDO_ON/OFF
SHDN
VCC
ADM8830
C5
2.2F
VOLTAGE
DOUBLER
OSCILLATOR
CONTROL
LOGIC
LDO
VOLTAGE
REGULATOR
DOUBLE
TIMING
GENERATOR
TRIPLE
VOLTAGE
TRIPLER
SHUTDOWN
CONTROL
DISCHARGE
VOLTAGE
INVERTER
GND
C1+
C1–
C1
2.2F
VOUT
LDO IN
C6
2.2F
+5VOUT
+5VIN
C2+
C2
C2– 1F
C3+
C3
C3– 1F
+15VOUT
C4+
C4
C4– 1F
+5.1V
C7
2.2F
+15.3V
C8
1F
–10VOUT
–10.2V
C9
1F
seamlessly maintained when switching from scanning mode to
blanking mode or vice versa.
The ADM8830 has a number of power saving features, including
low power shutdown and reduced quiescent current consumption
during the blanking periods mentioned above. The 5.1 V output
consumes the most power, so power efficiency is also maximized
on this output with an oscillator enabling scheme (Green Idle™).
This effectively senses the load current that is flowing and turns
on the charge pump only when charge needs to be delivered to
the 5 V pump doubler output.
The ADM8830 is fabricated using CMOS technology for minimal
power consumption. The part is packaged in 20-lead LFCSP
and TSSOP packages.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or oth-
erwise under any patent or patent rights of Analog Devices.Trademarks
and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.




ADM8830ACP-REEL7 pdf, 반도체, 판매, 대치품
ADM8830
TSSOP
C1– 1
20 GND
C1+ 2
19 –10VOUT
VCC 3
18 C4+
VOUT 4
17 C4–
LDO_IN
+5VOUT
+5VIN
5 ADM8830 16 C2+
6
TOP VIEW
(Not to Scale)
15
C2–
7 14 C3+
LDO_ON/OFF 8
13 C3–
SHDN 9
12 +15VOUT
SCAN/BLANK 10
11 CLKIN
PIN CONFIGURATIONS
LFCSP
VCC 1
VOUT 2
LDO_IN 3
+5VOUT 4
+5VIN 5
PIN 1
INDICATOR
ADM8830
TOP VIEW
15 C4–
14 C2+
13 C2–
12 C3+
11 C3–
Pin Number
TSSOP LFCSP
1, 2 19, 20
31
42
53
64
75
86
97
10 8
11 9
12
13, 14
15, 16
17, 18
19
20
10
11, 12
13, 14
15, 16
17
18
Mnemonic
C1–, C1+
VCC
VOUT
LDO_IN
+5VOUT
+5VIN
LDO_ON/OFF
SHDN
SCAN/BLANK
CLKIN
+15VOUT
C3–, C3+
C2–, C2+
C4–, C4+
–10VOUT
GND
PIN FUNCTION DESCRIPTIONS
Function
External capacitor C1 is connected between these pins. A 2.2 µF capacitor is recommended.
Positive Supply Voltage Input. Connect this pin to 3 V supply with a 2.2 µF decoupling capacitor.
Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 µF capacitor to
ground is required on this pin.
Voltage Regulator Input. The user has the option to bypass this circuit using the
LDO_ON/OFF pin.
+5.1 V Output Pin. This is derived by doubling and regulating the 3 V supply. A 2.2 µF ca-
pacitor to ground is required on this pin to stabilize the regulator.
+5.1 V Input Pin. This is the input to the voltage tripler and doubler inverter charge pump
circuits.
Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of
the 5 V voltage doubler output. A logic low isolates the internal LDO from the rest of the charge
pump circuits. This allows the use of an external LDO to regulate the 5 V voltage doubler
output. The output of this LDO is then fed back into the voltage tripler and doubler/inverter
circuits of the ADM8830.
Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing
generator and enables the discharge circuit to dissipate the charge on the voltage outputs,
thus driving them to 0 V.
Drive Mode Input. 3 V CMOS logic. A logic high places the part in scan (high current) mode
and the charge pump is driven by the internal oscillator. A logic low places the part in blanking
(low current) mode and the charge pump is driven by the (slower) external oscillator. This is
a power saving feature on the ADM8830.
External CLOCK Input. During a blanking period, the oscillator circuit selects this pin to drive
the charge pump circuit. This is at a lower frequency than the internal oscillator, resulting in
lower quiescent current consumption, thus saving power.
+15.3 V Output Pin. This is derived by tripling the +5.1 V regulated output. A 1 µF capacitor
is required on this pin.
External capacitor C3 is connected between these pins. A 1 µF capacitor is recommended.
External capacitor C2 is connected between these pins. A 1 µF capacitor is recommended.
External capacitor C4 is connected between these pins. A 1 µF capacitor is recommended.
–10.2 V Output Pin. This is derived by doubling and inverting the +5.1 V regulated output.
A 1 µF capacitor is required on this pin.
Device Ground Pin.
–4– REV. B

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ADM8830ACP-REEL7 전자부품, 판매, 대치품
ADM8830
SCANNING AND BLANKING
A TFT LCD panel is essentially made up of a bank of capacitors,
each representing a pixel in the display. These capacitors store
different levels of charge, depending on the amount of lumines-
cence required for a given pixel.When a picture is being displayed
on the panel, a scan of all the pixel capacitors is performed, placing
different levels of charge on each in order to create the image.The
process of updating the display like this is called “scanning.” Once
scanned, an image will be held by pixel capacitance and the con-
troller and source line drivers can be put into a low power mode.
This low power mode is referred to as the blanking mode on the
ADM8830. Over a finite period of time, this pixel charge will leak
and the capacitors will have to be refreshed in order to maintain
the image.
The ADM8830 caters to the two modes of operation described
above as follows.When the TFT LCD panel is in scanning mode,
a logic high on the SCAN/BLANK input places the device in high
current power mode, providing extra power (extra current) to the
LCD controller and the source line drivers. If the panel continues
to be updated (as when a moving picture is being displayed), then
the ADM8830 can be continually operated in scanning mode. If
the same image is kept on the panel, a logic low is applied to the
SCAN/BLANK input and the ADM8830 enters blanking (low
current) mode. Depending on how often the image is being updated,
the ADM8830 can be operated with a variable SCAN/BLANK
duty cycle.This helps to maximize power efficiency and therefore
extends the battery life.
90%
10%
tR tF
tH
tT
tR: RISE TIME
tF: FALL TIME
tH
tT
@
100%
=
DUTY
CYCLE
Figure 1. Duty Cycle of External Clock
POWER SEQUENCING
The gate drive supplies must be sequenced such that the –10 V
supply is up before the +15 V supply for the TFT panel to power
up correctly. The ADM8830 controls this sequence. When the
device is turned on (a logic high on SHDN), the ADM8830 allows
the –10 V output to ramp immediately but holds off the +15 V
output. It continues to do this until the negative output has reached
–3 V. At this point, the positive output is enabled and allowed to
ramp up to +15 V. This sequence is highlighted in Figure 2.
VCC
SHDN
+5V
t R15V
t R5V
90%
10%
+15V
t DELAY
–10V
90%
10%
LOAD
SCAN/BLANK
t F10V
–3V
t F15V
t F5V
t R10V
EXTERNAL CLOCK
Figure 2. Power Sequence
TRANSIENT RESPONSE
The ADM8830 features extremely fast transient response, making
it very suitable for fast image updates on TFT LCD panels. This
means that even under changing load conditions there is still very
effective regulation of the 5 V output. TPCs 10 and 11 show how
the 5.1 V output responds when a maximum load is dynamically
connected and disconnected. Note that the output settles within
5 µs to less than 1% of the output level.
EXTERNAL CLOCK
The ADM8830 has an internal 100 kHz oscillator, but an external
clock source can also be used to clock the part. This clock source
must be applied to the CLKIN pin. Power is saved during blank-
ing periods by disabling the internal oscillator and switching to
the lower frequency external clock source. To achieve optimum
performance of the charge pump circuitry, it is important that the
duty cycle of the external clock source be 50% and that the rise
and fall times be less than 20 ns.
3.10
0.28
0.4
0.75
0.9
0.25
0.5
1.95 2.10
REV. B
SOLDER MASK
BOARD METALLIZATION
DIMENSIONS IN
MILLIMETERS
0.2 0.25
Figure 3. Suggested LFCSP 4 mm 4 mm 20-Lead
Land Pattern
–7–

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부품번호상세설명 및 기능제조사
ADM8830ACP-REEL7

Charge Pump Regulator for Color TFT Panel

Analog Devices
Analog Devices

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